JohnSwenson wrote: 
> How about the AM3874? This is what I was planning on using For Gen2
> since it has all the display stuff builtin. According to the technical
> manual the USB system DOES have a hardware scheduler, checking the
> details you can turn off packet interrupts if using DMA so it looks like
> this might be better. 
> 

This still looks like the more limited hardware: 

"An interrupt is generated whenever a packet is received from the host
and the software may use this
interrupt to unload the packet from the FIFO and clear the RXPKTRDY bit
in the PERI_RXCSR
register (bit 0) in the same way as for a Bulk Rx endpoint. As the
interrupt could occur almost any time
within a frame(/microframe), depending on when the host has scheduled
the transaction, the timing of
FIFO unload requests will probably be irregular. If the data sink for
the endpoint is going to some
external hardware, it may be better to minimize the requirement for
additional buffering by waiting until
the end of each frame(/microframe) before unloading the FIFO."

It may work fine - all I'm saying is that its not EHCI which I suspect
needs more gates to implement as there's no need for an interrupt per
packet.  If you compare the usb section with the usb host port section
in the AM3715 reference manual you will see the difference.  This looks
to have separate host and otg hardware - the host port is ehci/ohci,
whereas the otg is the mentor block.  

Lets see what your Beagle Bone does when you get it and then review.


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