On Wed, 02 Jul 2025, Uma Shankar <uma.shan...@intel.com> wrote:
> From: Chaitanya Kumar Borah <chaitanya.kumar.bo...@intel.com>
>
> Add a color pipeline with three colorops in the sequence
>
> 1D LUT - 3x4 CTM - 1D LUT
>
> This pipeline can be used to do any color space conversion or HDR
> tone mapping
>
> v2: Change namespace to drm_plane_colorop*
> v3: Use simpler/pre-existing colorops for first iteration
>
> Signed-off-by: Uma Shankar <uma.shan...@intel.com>
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.bo...@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_color.c | 49 ++++++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_color.h | 3 ++
> 2 files changed, 52 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c
> b/drivers/gpu/drm/i915/display/intel_color.c
> index 5f38a5ff541c..90ac6530d1a5 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -32,6 +32,10 @@
> #include "intel_display_types.h"
> #include "intel_dsb.h"
> #include "intel_vrr.h"
> +#include "skl_universal_plane.h"
> +
> +#define PLANE_DEGAMMA_SIZE 128
> +#define PLANE_GAMMA_SIZE 32
>
> struct intel_color_funcs {
> int (*color_check)(struct intel_atomic_state *state,
> @@ -4001,6 +4005,51 @@ struct intel_plane_colorop
> *intel_plane_colorop_create(enum intel_color_block id
> return colorop;
> }
>
> +int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct
> drm_prop_enum_list *list)
plane the F?
Please let's not invent ad hoc acronyms that will confuse people.
> +{
> + struct intel_plane_colorop *colorop;
> + struct drm_device *dev = plane->dev;
> + int ret;
> + struct drm_colorop *prev_op;
> +
> + colorop = intel_plane_colorop_create(CB_PLANE_PRE_CSC_LUT);
> +
> + ret = drm_plane_colorop_curve_1d_lut_init(dev, &colorop->base, plane,
> + PLANE_DEGAMMA_SIZE,
> +
> DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
> +
> DRM_COLOROP_FLAG_ALLOW_BYPASS);
> +
> + if (ret)
> + return ret;
> +
> + list->type = colorop->base.base.id;
> + list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d",
> colorop->base.base.id);
> +
> + /* TODO: handle failures and clean up*/
> + prev_op = &colorop->base;
> +
> + colorop = intel_plane_colorop_create(CB_PLANE_CSC);
> + ret = drm_plane_colorop_ctm_3x4_init(dev, &colorop->base, plane,
> + DRM_COLOROP_FLAG_ALLOW_BYPASS);
> + if (ret)
> + return ret;
> +
> + drm_colorop_set_next_property(prev_op, &colorop->base);
> + prev_op = &colorop->base;
> +
> + colorop = intel_plane_colorop_create(CB_PLANE_POST_CSC_LUT);
> + ret = drm_plane_colorop_curve_1d_lut_init(dev, &colorop->base, plane,
> + PLANE_GAMMA_SIZE,
> +
> DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
> +
> DRM_COLOROP_FLAG_ALLOW_BYPASS);
> + if (ret)
> + return ret;
> +
> + drm_colorop_set_next_property(prev_op, &colorop->base);
> +
> + return 0;
> +}
> +
> void intel_color_crtc_init(struct intel_crtc *crtc)
> {
> struct intel_display *display = to_intel_display(crtc);
> diff --git a/drivers/gpu/drm/i915/display/intel_color.h
> b/drivers/gpu/drm/i915/display/intel_color.h
> index f3c7cd694b99..ce9db761c6e2 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.h
> +++ b/drivers/gpu/drm/i915/display/intel_color.h
> @@ -14,6 +14,8 @@ struct intel_crtc;
> struct intel_display;
> struct intel_dsb;
> struct drm_property_blob;
> +struct drm_plane;
> +struct drm_prop_enum_list;
> enum intel_color_block;
>
> void intel_color_init_hooks(struct intel_display *display);
> @@ -43,5 +45,6 @@ bool intel_color_lut_equal(const struct intel_crtc_state
> *crtc_state,
> void intel_color_assert_luts(const struct intel_crtc_state *crtc_state);
> struct intel_plane_colorop *intel_colorop_alloc(void);
> struct intel_plane_colorop *intel_plane_colorop_create(enum
> intel_color_block id);
> +int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct
> drm_prop_enum_list *list);
>
> #endif /* __INTEL_COLOR_H__ */
--
Jani Nikula, Intel
