Add CSI node to Tegra20 and Tegra30 device trees.

Signed-off-by: Svyatoslav Ryhel <clamo...@gmail.com>
---
 arch/arm/boot/dts/nvidia/tegra20.dtsi | 17 ++++++++++++++++-
 arch/arm/boot/dts/nvidia/tegra30.dtsi | 19 ++++++++++++++++++-
 2 files changed, 34 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/nvidia/tegra20.dtsi 
b/arch/arm/boot/dts/nvidia/tegra20.dtsi
index 606839fd40bb..d00786368115 100644
--- a/arch/arm/boot/dts/nvidia/tegra20.dtsi
+++ b/arch/arm/boot/dts/nvidia/tegra20.dtsi
@@ -64,7 +64,7 @@ mpe@54040000 {
 
                vi@54080000 {
                        compatible = "nvidia,tegra20-vi";
-                       reg = <0x54080000 0x00040000>;
+                       reg = <0x54080000 0x00000800>;
                        interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&tegra_car TEGRA20_CLK_VI>;
                        resets = <&tegra_car 20>;
@@ -72,6 +72,21 @@ vi@54080000 {
                        power-domains = <&pd_venc>;
                        operating-points-v2 = <&vi_dvfs_opp_table>;
                        status = "disabled";
+
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       ranges = <0x0 0x54080000 0x4000>;
+
+                       csi@800 {
+                               compatible = "nvidia,tegra20-csi";
+                               reg = <0x800 0x200>;
+                               clocks = <&tegra_car TEGRA20_CLK_CSI>;
+                               clock-names = "csi";
+                               power-domains = <&pd_venc>;
+
+                               status = "disabled";
+                       };
                };
 
                /* DSI MIPI calibration logic is a part of VI/CSI */
diff --git a/arch/arm/boot/dts/nvidia/tegra30.dtsi 
b/arch/arm/boot/dts/nvidia/tegra30.dtsi
index d9223bd7cf3b..c3e9212d5edf 100644
--- a/arch/arm/boot/dts/nvidia/tegra30.dtsi
+++ b/arch/arm/boot/dts/nvidia/tegra30.dtsi
@@ -151,7 +151,7 @@ mpe@54040000 {
 
                vi@54080000 {
                        compatible = "nvidia,tegra30-vi";
-                       reg = <0x54080000 0x00040000>;
+                       reg = <0x54080000 0x00000800>;
                        interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&tegra_car TEGRA30_CLK_VI>;
                        resets = <&tegra_car 20>;
@@ -162,6 +162,23 @@ vi@54080000 {
                        iommus = <&mc TEGRA_SWGROUP_VI>;
 
                        status = "disabled";
+
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       ranges = <0x0 0x54080000 0x4000>;
+
+                       csi@800 {
+                               compatible = "nvidia,tegra30-csi";
+                               reg = <0x800 0x200>;
+                               clocks = <&tegra_car TEGRA30_CLK_CSI>,
+                                        <&tegra_car TEGRA30_CLK_CSIA_PAD>,
+                                        <&tegra_car TEGRA30_CLK_CSIB_PAD>;
+                               clock-names = "csi", "csia_pad", "csib_pad";
+                               power-domains = <&pd_venc>;
+
+                               status = "disabled";
+                       };
                };
 
                /* DSI MIPI calibration logic is a part of VI/CSI */
-- 
2.48.1

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