Tegra30 has CSI PAD clock enable bits embedded into PLLD/PLLD2 registers. Add ids for these clocks.
Signed-off-by: Svyatoslav Ryhel <clamo...@gmail.com> --- include/dt-bindings/clock/tegra30-car.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/tegra30-car.h b/include/dt-bindings/clock/tegra30-car.h index f193663e6f28..14b83e90a0fc 100644 --- a/include/dt-bindings/clock/tegra30-car.h +++ b/include/dt-bindings/clock/tegra30-car.h @@ -271,6 +271,8 @@ #define TEGRA30_CLK_AUDIO3_MUX 306 #define TEGRA30_CLK_AUDIO4_MUX 307 #define TEGRA30_CLK_SPDIF_MUX 308 -#define TEGRA30_CLK_CLK_MAX 309 +#define TEGRA30_CLK_CSIA_PAD 309 +#define TEGRA30_CLK_CSIB_PAD 310 +#define TEGRA30_CLK_CLK_MAX 311 #endif /* _DT_BINDINGS_CLOCK_TEGRA30_CAR_H */ -- 2.48.1