Document CSI hw block found in Tegra20 and Tegra30 SoC.
Signed-off-by: Svyatoslav Ryhel <clamo...@gmail.com>
---
.../display/tegra/nvidia,tegra210-csi.yaml | 78 +++++++++++++++----
1 file changed, 63 insertions(+), 15 deletions(-)
diff --git
a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml
b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml
index fa07a40d1004..a5669447a33b 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml
@@ -16,30 +16,78 @@ properties:
compatible:
enum:
+ - nvidia,tegra20-csi
+ - nvidia,tegra30-csi
- nvidia,tegra210-csi
reg:
maxItems: 1
- clocks:
- items:
- - description: module clock
- - description: A/B lanes clock
- - description: C/D lanes clock
- - description: E lane clock
- - description: test pattern generator clock
-
- clock-names:
- items:
- - const: csi
- - const: cilab
- - const: cilcd
- - const: cile
- - const: csi_tpg
+ clocks: true
+ clock-names: true
power-domains:
maxItems: 1
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - nvidia,tegra20-csi
+ then:
+ properties:
+ clocks:
+ items:
+ - description: module clock
+
+ clock-names:
+ items:
+ - const: csi
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - nvidia,tegra30-csi
+ then:
+ properties:
+ clocks:
+ items:
+ - description: module clock
+ - description: PAD A clock
+ - description: PAD B clock
+
+ clock-names:
+ items:
+ - const: csi
+ - const: csia_pad
+ - const: csib_pad
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - nvidia,tegra210-csi
+ then:
+ properties:
+ clocks:
+ items:
+ - description: module clock
+ - description: A/B lanes clock
+ - description: C/D lanes clock
+ - description: E lane clock
+ - description: test pattern generator clock
+
+ clock-names:
+ items:
+ - const: csi
+ - const: cilab
+ - const: cilcd
+ - const: cile
+ - const: csi_tpg
+
additionalProperties: false
required:
--
2.48.1
