On Fri, Oct 24, 2025 at 01:21:03PM +0800, Xiangxu Yin via B4 Relay wrote: > From: Xiangxu Yin <[email protected]> >
Please fix the subject prefix and drop the "for SM6150" suffix. Regards, Bjorn > Introduce DisplayPort controller node and associated QMP USB3-DP PHY > for SM6150 SoC. Add data-lanes property to the DP endpoint and update > clock assignments for proper DP integration. > > Reviewed-by: Dmitry Baryshkov <[email protected]> > Reviewed-by: Konrad Dybcio <[email protected]> > Signed-off-by: Xiangxu Yin <[email protected]> > --- > arch/arm64/boot/dts/qcom/sm6150.dtsi | 115 > ++++++++++++++++++++++++++++++++++- > 1 file changed, 113 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm6150.dtsi > b/arch/arm64/boot/dts/qcom/sm6150.dtsi > index > 6128d8c48f9c0807ac488ddac3b2377678e8f8c3..9741f8d14c72ed7dd6a5e483c5c0d578662f1d31 > 100644 > --- a/arch/arm64/boot/dts/qcom/sm6150.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6150.dtsi > @@ -14,6 +14,7 @@ > #include <dt-bindings/interconnect/qcom,icc.h> > #include <dt-bindings/interconnect/qcom,qcs615-rpmh.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > +#include <dt-bindings/phy/phy-qcom-qmp.h> > #include <dt-bindings/power/qcom-rpmpd.h> > #include <dt-bindings/power/qcom,rpmhpd.h> > #include <dt-bindings/soc/qcom,rpmh-rsc.h> > @@ -3717,6 +3718,7 @@ port@0 { > reg = <0>; > > dpu_intf0_out: endpoint { > + remote-endpoint = > <&mdss_dp0_in>; > }; > }; > > @@ -3749,6 +3751,89 @@ opp-307200000 { > }; > }; > > + mdss_dp0: displayport-controller@ae90000 { > + compatible = "qcom,sm6150-dp", > "qcom,sm8150-dp", "qcom,sm8350-dp"; > + > + reg = <0x0 0x0ae90000 0x0 0x200>, > + <0x0 0x0ae90200 0x0 0x200>, > + <0x0 0x0ae90400 0x0 0x600>, > + <0x0 0x0ae90a00 0x0 0x600>, > + <0x0 0x0ae91000 0x0 0x600>; > + > + interrupt-parent = <&mdss>; > + interrupts = <12>; > + > + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, > + <&dispcc DISP_CC_MDSS_DP_AUX_CLK>, > + <&dispcc DISP_CC_MDSS_DP_LINK_CLK>, > + <&dispcc > DISP_CC_MDSS_DP_LINK_INTF_CLK>, > + <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>, > + <&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>; > + clock-names = "core_iface", > + "core_aux", > + "ctrl_link", > + "ctrl_link_iface", > + "stream_pixel", > + "stream_1_pixel"; > + > + assigned-clocks = <&dispcc > DISP_CC_MDSS_DP_LINK_CLK_SRC>, > + <&dispcc > DISP_CC_MDSS_DP_PIXEL_CLK_SRC>, > + <&dispcc > DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>; > + assigned-clock-parents = <&usb_qmpphy_2 > QMP_USB43DP_DP_LINK_CLK>, > + <&usb_qmpphy_2 > QMP_USB43DP_DP_VCO_DIV_CLK>, > + <&usb_qmpphy_2 > QMP_USB43DP_DP_VCO_DIV_CLK>; > + > + phys = <&usb_qmpphy_2 QMP_USB43DP_DP_PHY>; > + phy-names = "dp"; > + > + operating-points-v2 = <&dp_opp_table>; > + power-domains = <&rpmhpd RPMHPD_CX>; > + > + #sound-dai-cells = <0>; > + > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + mdss_dp0_in: endpoint { > + remote-endpoint = > <&dpu_intf0_out>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + > + mdss_dp0_out: endpoint { > + data-lanes = <3 2 0 1>; > + }; > + }; > + }; > + > + dp_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-160000000 { > + opp-hz = /bits/ 64 <160000000>; > + required-opps = > <&rpmhpd_opp_low_svs>; > + }; > + > + opp-270000000 { > + opp-hz = /bits/ 64 <270000000>; > + required-opps = > <&rpmhpd_opp_svs>; > + }; > + > + opp-540000000 { > + opp-hz = /bits/ 64 <540000000>; > + required-opps = > <&rpmhpd_opp_svs_l1>; > + }; > + }; > + }; > + > mdss_dsi0: dsi@ae94000 { > compatible = "qcom,sm6150-dsi-ctrl", > "qcom,mdss-dsi-ctrl"; > reg = <0x0 0x0ae94000 0x0 0x400>; > @@ -3844,8 +3929,8 @@ dispcc: clock-controller@af00000 { > <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, > <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>, > <0>, > - <0>, > - <0>; > + <&usb_qmpphy_2 QMP_USB43DP_DP_LINK_CLK>, > + <&usb_qmpphy_2 QMP_USB43DP_DP_VCO_DIV_CLK>; > > #clock-cells = <1>; > #reset-cells = <1>; > @@ -4214,6 +4299,32 @@ usb_qmpphy: phy@88e6000 { > status = "disabled"; > }; > > + usb_qmpphy_2: phy@88e8000 { > + compatible = "qcom,qcs615-qmp-usb3-dp-phy"; > + reg = <0x0 0x088e8000 0x0 0x2000>; > + > + clocks = <&gcc GCC_USB2_SEC_PHY_AUX_CLK>, > + <&gcc GCC_USB3_SEC_CLKREF_CLK>, > + <&gcc GCC_AHB2PHY_WEST_CLK>, > + <&gcc GCC_USB2_SEC_PHY_PIPE_CLK>; > + clock-names = "aux", > + "ref", > + "cfg_ahb", > + "pipe"; > + > + resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR >, > + <&gcc GCC_USB3_DP_PHY_SEC_BCR>; > + reset-names = "phy_phy", > + "dp_phy"; > + > + #clock-cells = <1>; > + #phy-cells = <1>; > + > + qcom,tcsr-reg = <&tcsr 0xbff0 0xb24c>; > + > + status = "disabled"; > + }; > + > usb_1: usb@a6f8800 { > compatible = "qcom,qcs615-dwc3", "qcom,dwc3"; > reg = <0x0 0x0a6f8800 0x0 0x400>; > > -- > 2.34.1 > >
