On Sat, Feb 21, 2026 at 11:20:17AM +0000, Alice Ryhl wrote: > On Wed, Feb 11, 2026 at 05:37:09PM -0800, Deborah Brouwer wrote: > > From: Boris Brezillon <[email protected]> > > > > Add a Memory Management Unit (MMU) driver for Tyr. The MMU wraps a > > SlotManager for allocating hardware address space slots. The underlying > > AddressSpaceManager performs MMU operations including enabling/disabling > > address spaces, flushing page tables, and locking regions for page table > > updates. > > > > Signed-off-by: Boris Brezillon <[email protected]> > > Co-developed-by: Deborah Brouwer <[email protected]> > > Signed-off-by: Deborah Brouwer <[email protected]> > > > +/// Any resource/information that will be used by the AddressSpaceManager > > +/// to make a VM active is present in VmAsData. > > +/// > > +/// On activation, we will pass an Arc<VmAsData> that will be stored in > > +/// the slot to make sure the page table and the underlying resources > > +/// (pages) used by the AS slot won't go away while the MMU points to > > +/// those. > > +pub(crate) struct VmAsData { > > + /// Tracks this VM's binding to a hardware address space slot. > > + as_seat: LockedBy<Seat, AsSlotManager>, > > + /// Hardware configuration for this address space. > > + as_config: AddressSpaceConfig, > > + /// Page table (managed by devres). > > + pub(crate) page_table: Pin<KBox<Devres<IoPageTable<ARM64LPAES1>>>>, > > I don't think the Box is needed if you #[pin] this field.
Ok, for v2, I moved the page table initialization from struct Vm to struct VmAsData in the address_space.rs which allows us to construct it in place and #[pin] it. > > Alice
