SSD133X screens were driven at 8bpp RGB332 despite supporting 16bpp RGB565. Switch the SSD133X data path to RGB565.
Assisted-by: Claude:claude-opus-4-8 Signed-off-by: Amit Barzilai <[email protected]> Reviewed-by: Javier Martinez Canillas <[email protected]> --- drivers/gpu/drm/solomon/ssd130x.c | 48 ++++++++++++++++++++----------- 1 file changed, 31 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/solomon/ssd130x.c b/drivers/gpu/drm/solomon/ssd130x.c index 0b0fc6fe3df2..8cf1e9c84a81 100644 --- a/drivers/gpu/drm/solomon/ssd130x.c +++ b/drivers/gpu/drm/solomon/ssd130x.c @@ -146,6 +146,11 @@ #define SSD133X_DEFAULT_CONTRAST_B 0x50 #define SSD133X_DEFAULT_CONTRAST_C 0x7d +/* ssd133x remap byte (data of SSD13XX_SET_SEG_REMAP) */ +#define SSD133X_SET_REMAP_COM_SPLIT BIT(5) +#define SSD133X_SET_REMAP_COLOR_DEPTH_MASK GENMASK(7, 6) +#define SSD133X_COLOR_DEPTH_65K 0x1 + #define MAX_CONTRAST 255 const struct ssd130x_deviceinfo ssd130x_variants[] = { @@ -618,17 +623,17 @@ static int ssd133x_set_contrast(struct ssd130x_device *ssd130x, u32 brightness) static int ssd133x_init(struct ssd130x_device *ssd130x) { int ret; + /* + * Horizontal address increment, normal SA,SB,SC (e.g. RGB) sub-pixel + * order, COM split odd even and 65k (RGB565) color depth. + */ + const u8 remap = SSD133X_SET_REMAP_COM_SPLIT | + FIELD_PREP(SSD133X_SET_REMAP_COLOR_DEPTH_MASK, SSD133X_COLOR_DEPTH_65K); const u8 cmds[] = { 2, SSD133X_SET_MASTER_CURRENT, 0x06, 3, SSD133X_SET_COL_RANGE, 0x00, ssd130x->width - 1, 3, SSD133X_SET_ROW_RANGE, 0x00, ssd130x->height - 1, - /* - * Horizontal Address Increment - * Normal order SA,SB,SC (e.g. RGB) - * COM Split Odd Even - * 256 color format - */ - 2, SSD13XX_SET_SEG_REMAP, 0x20, + 2, SSD13XX_SET_SEG_REMAP, remap, 2, SSD133X_SET_DISPLAY_START, 0x00, 2, SSD133X_SET_DISPLAY_OFFSET, 0x00, 1, SSD133X_SET_DISPLAY_NORMAL, @@ -829,14 +834,20 @@ static int ssd133x_update_rect(struct ssd130x_device *ssd130x, * COM0 to COM[N - 1] are the rows and SEG0 to SEG[M - 1] are * the columns. * - * Each Segment has a 8-bit pixel and each Common output has a - * row of pixels. When using the (default) horizontal address - * increment mode, each byte of data sent to the controller has - * a Segment (e.g: SEG0). + * Each Segment holds one pixel and each Common output has a row + * of pixels. A pixel is 8 bits (one byte) in the 256 color + * (RGB332) format or 16 bits (two bytes) in the 65k color + * (RGB565) format. When using the (default) horizontal address + * increment mode, the pixel data is sent Segment by Segment + * (e.g: SEG0 first). * * When using the 256 color depth format, each pixel contains 3 - * sub-pixels for color A, B and C. These have 3 bit, 3 bit and - * 2 bits respectively. + * sub-pixels for color A, B and C. These have 3, 3 and 2 bits + * respectively. + * + * When using the 65k color depth format, each pixel contains 3 + * sub-pixels for color A, B and C. These have 5, 6 and 5 bits + * respectively. */ /* Set column start and end */ @@ -909,9 +920,10 @@ static void ssd132x_clear_screen(struct ssd130x_device *ssd130x, u8 *data_array) static void ssd133x_clear_screen(struct ssd130x_device *ssd130x, u8 *data_array) { - const struct drm_format_info *fi = drm_format_info(DRM_FORMAT_RGB332); + const struct drm_format_info *fi; unsigned int pitch; + fi = drm_format_info(DRM_FORMAT_RGB565); if (!fi) return; @@ -978,17 +990,18 @@ static int ssd133x_fb_blit_rect(struct drm_framebuffer *fb, struct drm_format_conv_state *fmtcnv_state) { struct ssd130x_device *ssd130x = drm_to_ssd130x(fb->dev); - const struct drm_format_info *fi = drm_format_info(DRM_FORMAT_RGB332); + const struct drm_format_info *fi; unsigned int dst_pitch; struct iosys_map dst; + fi = drm_format_info(DRM_FORMAT_RGB565); if (!fi) return -EINVAL; dst_pitch = drm_format_info_min_pitch(fi, 0, drm_rect_width(rect)); iosys_map_set_vaddr(&dst, data_array); - drm_fb_xrgb8888_to_rgb332(&dst, &dst_pitch, vmap, fb, rect, fmtcnv_state); + drm_fb_xrgb8888_to_rgb565be(&dst, &dst_pitch, vmap, fb, rect, fmtcnv_state); ssd133x_update_rect(ssd130x, rect, data_array, dst_pitch); @@ -1446,10 +1459,11 @@ static int ssd133x_crtc_atomic_check(struct drm_crtc *crtc, struct ssd130x_device *ssd130x = drm_to_ssd130x(drm); struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); struct ssd130x_crtc_state *ssd130x_state = to_ssd130x_crtc_state(crtc_state); - const struct drm_format_info *fi = drm_format_info(DRM_FORMAT_RGB332); + const struct drm_format_info *fi; unsigned int pitch; int ret; + fi = drm_format_info(DRM_FORMAT_RGB565); if (!fi) return -EINVAL; -- 2.55.0
