On Wed, 10 Oct 2001, Keith Whitwell wrote:
>
> >
> > Finally, someone who knows the stuff :)) No, there is no such variable,
> > but this phrase I plucked from the comment. Here is an example from
> > radeon.h:
> >
> > /* CP vertex/indirect buffer data */
> > unsigned long bufStart; /* Offset into AGP space */
> > drmHandle bufHandle; /* Handle from drmAddMap */
> > drmSize bufMapSize; /* Size of map */
> > int bufSize; /* Size of buffers (in MB) */
> > unsigned char *buf; /* Map */
> > int bufNumBufs; /* Number of buffers */
> > drmBufMapPtr buffers; /* Buffer map */
> >
> > Now, from these I guess that *buf is where I can access the data directly
> > for Xserver. bufSize is the size of the thing - does it have to be in MB ?
> > Or just page-aligned is fine ? bufStart - what do I use this for ? Can I
> > use it to reference data in the buffer or do I have to add or subtract a
> > magic number from it before writing into card's registers ? (and to answer
> > your questions: I have made a copy of the same fields /with buf replaced
> > with capture and allocated space.. nothing seems to crash.., 3d workds,
> > 1mb is reserved someplace. /)
>
> I'll check up & give you proper answers in a sec. However, it sounds like
> you're just looking to allocate a buffer of a meg or two on the card
> somewhere and use that for some purpose. If so, the 3d drivers are doing
> this all the time - to hold textures. You should be able to do the same
> thing - just grab a meg or two of texture memory and use that for your
> purposes. You'll need a trick or two to stop others grabbing it back when
No, no, I have no trouble allocating RAM. I don't know what to do with it
next.
I understand how scatter-gather works from looking at bt848 driver. I
believe I know the generalities of PCI GART and AGP GART for ATI cards.
The problem is I don't understand the specifics. Here is a more involved
explanation (all for Radeon as this is what I have plugged in now,
besides the docs are more thorough):
There is a DMA_VIP0_TABLE_ADDR which accepts a 32 bit address of a table
of commands for DMA transfer. Looking at the docs it seems that the
transfer is initiated by writing the total number of bytes to transfer in
VIPH_CH0_SBCNT. Now, I know the format of the table. But, when I try
writing the physical address of the page to make the transfer nothing
(useful) happens. So, I guess it goes thru some kind of translation. But
which ? Both PCI GART and AGP GART are supposed to "straighten" memory by
themselves so an extra indirect should not be necessary. Furthermore,
which addresses need to be written in the table - physical or not ?
Now, I could have tried all combinations, except that I don't even know
that I am using the right register. There are several DMA engines in the
card: 4 VIP ones, GUI, and others. The bmaster example uses GUI to
transfer image into main memory, but there is no example of transfer back.
Now, the decoder chip is located on VIP bus (which is only one for the
whole card), but there are 4 VIP DMA channels with cryptic statement of
"only 2 DMA transfers could be active in the queue in the same time". Does
that mean 2 transfers from VIP devices or one VIP and one 3d I don't know
either. As you can see this multiplies the choices significantly. So I
want to reduce them by eliminating guesswork from address things.
Which brings back the question about AGP offset - what is this ?
thanks
Vladimir Dergachev
PS And, in case it helps, here is a list of things I already tried:
standalone kernel module, with ram allocated by rvmalloc from bt848.
It seems to both work and not. I see address changing in the DMA status
registers, but I don't get "End of DMA" interrupts. And I don't get any
data in the buffers. No lockups though. I tried allocating ram using drm.
I can allocate it fine. I don't know what to do with it next (as I can get
to physical addresses from within X to form a DMA transfer table. And I
don't see any code in X making such a table).
> resources run low, but it is doable without modifying any kernel structures.
> Have a look at the files in lib/GL/mesa/src/drv/XYZ/*_tex*.[ch] and in
> particular functions like i810UploadTexImages() which scan the LRU and
> allocate memory.
>
> Keith
>
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