On Wed, 2004-05-26 at 12:34, Mike Mestnik wrote: > Attached is a screen shoot of the effect of adding 1024 to the > ColorOffset.
It's hard for me to recognize anything; can you describe your observations? > I still have to find where rmesa->state.color.drawOffset comes from and > what effect the first 4 bits(define RADEON_COLOROFFSET_MASK > 0xfffffff0) are for The 128 bit alignment. > (Why "& RADEON_COLOROFFSET_MASK" was missing from _lock.c and _ioctl.c). I guess the offset is assumed to be aligned there. The hardware will probably ignore the lower bits anyway. -- Earthling Michel DÃnzer | Debian (powerpc), X and DRI developer Libre software enthusiast | http://svcs.affero.net/rm.php?r=daenzer ------------------------------------------------------- This SF.Net email is sponsored by: Oracle 10g Get certified on the hottest thing ever to hit the market... Oracle 10g. Take an Oracle 10g class now, and we'll give you the exam FREE. http://ads.osdn.com/?ad_id=3149&alloc_id=8166&op=click -- _______________________________________________ Dri-devel mailing list [EMAIL PROTECTED] https://lists.sourceforge.net/lists/listinfo/dri-devel
