On Tuesday, October 23, 2007 12:54 am Dave Airlie wrote:
> shared-core/i915_dma.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> New commits:
> commit a294aa724a1e932fb6017383e08532bfcc914df0
> Author: Dave Airlie <[EMAIL PROTECTED]>
> Date: Tue Oct 23 17:54:07 2007 +1000
>
> i915: require mfence before submitting batchbuffer
>
> diff --git a/shared-core/i915_dma.c b/shared-core/i915_dma.c
> index d0d65f8..f0fd603 100644
> --- a/shared-core/i915_dma.c
> +++ b/shared-core/i915_dma.c
> @@ -1044,6 +1044,9 @@ static int i915_execbuffer(struct drm_device
> *dev, void *data, if (ret)
> goto out_free;
>
> + /* make sure all previous memory operations have passed */
> + asm volatile("mfence":::"memory");
> +
Mabye use mb() here instead?
Also, is this ordering UC or WC writes against the DMA read from the
device? Maybe the comment should read "make sure prior stores are
visible to the device before we submit the buffer", assuming that's
what's going on...
Jesse
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