Hi Tatti,
Where could we find some documentations/info about the new IRM
project? I'm very interested in the new design.
Govinda Tatti <> wrote:
> Paul,
>
> This issue will be addressed in the next phase of DDI interrupt
> project called Interrupt Resource Management (IRM). Currently our
> team is working on the prototype and planning to integrate this
> feature into Nevada around May/June time frame.
>
> NOTE: We added a temporary workaround (allocate 8 MSI/Xs instead of
> default 2) just for the SPARC platforms based on the platform team's
> request.
>
>
>> I'm observing some confusing behaviour...
>>
>> When I call ddi_intr_get_navail() I can see that my device,
>> correctly, is exporting 64 MSI-X interrupts and they are all
>> available. Yet, when I call ddi_intr_alloc() all I get is 2
>> interrupts.
>> This seems a little restrictive for the 16-way (4 quadcore) Sun x4450
>> that I'm using. Is there some limit that's being imposed somewhere in
>> the apic driver? If so, can it be bypassed?
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