Liu, Jiang wrote:
On x86 platform, you also need to change another constraints "apic_msix_max" in uts/i86pc/io/pcplusmp/apic_introp.c, this variable will take effect in apic_alloc_msix_vectors() when you allocate interrupt handlers. This limitation is x86 platform specific.
Ah ok. I'll try that. Actually apic_navail_vector() was the limit; it was returning 29. I'll alter the tweakable you mention. Thanks :-)
BTW; is there any plan to make the apic code thread/core/package aware such that interrupts will get affinitized to different packages rather than just using consecutive CPU numbers (or is the CPU numbering scheme such that consecutive CPUs are actually on different packages)?
Paul
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