On 10/08/2010 12:03 PM, Brandeburg, Jesse wrote: > I guess, first did you end up with the wmb/rmb patches added by IBM for > the PPC stuff upstream? I'm not sure we have those in our sf.net driver > yet.
I haven't added that. Is it needed for x86? >> Here's the result of a typical event: >> >> eth4 (affected device) >> EICS: 00000001 >> EIMS: d619fffe >> EIMC: d619fffe >> EIAC: 4000ffff >> EIAM: 0000ffff >> packets waiting on rx ring 0 > > (leading zeros added above for clarity) > so this says you have an interrupt on vector zero, which is masked, which > means if you read the RDH/RDT registers you would probably see they are > farther than two apart (meaning data was rx'd by hardware into memory but > not taken by driver) The "packets waiting" message above comes from looping over all the rings and checking the IXGBE_RXD_STAT_DD bit on rx_ring->next_to_clean. I didn't check RDH/RDT but I expect it would be as you say. >> We've got a few clues--it seems to be related to tcp traffic, it doesn't >> take much traffic at all (less than 10% of a single core cpu usage), and >> dropping the link speed from 10Gbps to 1Gbps made the problem go away. > > so dropping the link speed changes timing and probably eliminates your > issue via luck. Yes, that's what I figured. >> Anyone got any ideas what might be going on? > > To me this sounds extremely like an interrupt enable race, possibly at the > hardware level with your chipset that is implementing MSI-X > > One thing we can do is stop using autoclear (EIAC), which requires a > slight bit of code to be added to the MSI-X routines, to make sure the > driver writes EICR to clear the bit that was asserted. So basically we'd set the tx/rx queue bits in EIAC to zero at init time and then in ixgbe_clean_rxtx_many() (in my specific case) we'd call ixgbe_irq_disable_queues()? Is anything else needed? Chris -- Chris Friesen Software Developer GENBAND chris.frie...@genband.com www.genband.com ------------------------------------------------------------------------------ Beautiful is writing same markup. Internet Explorer 9 supports standards for HTML5, CSS3, SVG 1.1, ECMAScript5, and DOM L2 & L3. Spend less time writing and rewriting code and more time creating great experiences on the web. Be a part of the beta today. http://p.sf.net/sfu/beautyoftheweb _______________________________________________ E1000-devel mailing list E1000-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/e1000-devel To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired
