The previous IDT is not in page aligned memory. We allocate and copy it in page aligned memory, so that other program may use page level protection on that.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen....@intel.com> Cc: "Fan, Jeff" <jeff....@intel.com> Cc: "Kinney, Michael D" <michael.d.kin...@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c index 06ffc6d..031a5fe 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c @@ -1218,6 +1218,7 @@ InitializeMpServiceData ( PROCESSOR_SMM_DESCRIPTOR *Psd; UINT8 *GdtTssTables; UINTN GdtTableStepSize; + VOID *IdtBase; // // Initialize physical address mask @@ -1232,6 +1233,14 @@ InitializeMpServiceData ( // Cr3 = SmmInitPageTable (); + // + // Allocate and Copy because previous IdtBase might not be 4K aligned. + // + IdtBase = AllocatePages (EFI_SIZE_TO_PAGES(gcSmiIdtr.Limit + 1)); + ASSERT (IdtBase != 0); + CopyMem (IdtBase, (VOID *)gcSmiIdtr.Base, gcSmiIdtr.Limit + 1); + gcSmiIdtr.Base = (UINTN)IdtBase; + GdtTssTables = InitGdt (Cr3, &GdtTableStepSize); // -- 1.9.5.msysgit.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
