Move IDT table to C code is very good! I think EFIAPI is no longer required for InitializeIDTSmmStackGuard().
Reviewed-by: Jeff Fan <jeff....@intel.com> -----Original Message----- From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of jiewen yao Sent: Thursday, November 26, 2015 4:59 PM To: edk2-de...@ml01.01.org Cc: Kinney, Michael D; Yao, Jiewen; Fan, Jeff Subject: [edk2] [patch] UefiCpuPkg/PiSmmCpu: Move IDT to page aligned memory. The IDT in ASM is removed. We rely on C code to allocate IDT. We also move InitializeIDTSmmStackGuard() from ASM to C file. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen....@intel.com> Cc: "Fan, Jeff" <jeff....@intel.com> Cc: "Kinney, Michael D" <michael.d.kin...@intel.com> --- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S | 224 +-------------------- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm | 34 +--- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c | 24 +++ UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 13 ++ UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S | 249 +----------------------- UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm | 33 +--- UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c | 21 ++ 7 files changed, 72 insertions(+), 526 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S index 4130bf5..eb41410 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S @@ -24,6 +24,7 @@ ASM_GLOBAL ASM_PFX(PageFaultStubFunction) ASM_GLOBAL ASM_PFX(gSmiMtrrs) ASM_GLOBAL ASM_PFX(gcSmiIdtr) ASM_GLOBAL ASM_PFX(gcSmiGdtr) +ASM_GLOBAL ASM_PFX(gTaskGateDescriptor) ASM_GLOBAL ASM_PFX(gcPsd) ASM_GLOBAL ASM_PFX(FeaturePcdGet (PcdCpuSmmProfileEnable)) @@ -236,207 +237,10 @@ ASM_PFX(gcPsd): ASM_PFX(gcSmiGdtr): .word GDT_SIZE - 1 .long NullSeg -ASM_PFX(gcSmiIdtr): .word IDT_SIZE - 1 - .long _SmiIDT - -_SmiIDT: -# The following segment repeats 32 times: -# No. 1 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 2 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 3 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 4 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 5 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 6 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 7 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 8 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 9 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 10 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 11 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 12 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 13 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 14 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 15 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 16 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 17 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 18 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 19 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 20 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 21 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 22 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 23 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 24 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 25 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 26 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 27 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 28 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 29 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 30 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 31 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 -# No. 32 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - -.equ IDT_SIZE, . - _SmiIDT - -TaskGateDescriptor: +ASM_PFX(gcSmiIdtr): .word 0 + .long 0 + +gTaskGateDescriptor: .word 0 # Reserved .word EXCEPTION_TSS_SEL # TSS Segment selector .byte 0 # Reserved @@ -891,21 +695,3 @@ ASM_PFX(PageFaultStubFunction): # clts iret - -ASM_GLOBAL ASM_PFX(InitializeIDTSmmStackGuard) -ASM_PFX(InitializeIDTSmmStackGuard): - pushl %ebx -# -# If SMM Stack Guard feature is enabled, the Page Fault Exception entry in IDT -# is a Task Gate Descriptor so that when a Page Fault Exception occurs, -# the processors can use a known good stack in case stack ran out. -# - leal _SmiIDT + 14 * 8, %ebx - leal TaskGateDescriptor, %edx - movl (%edx), %eax - movl %eax, (%ebx) - movl 4(%edx), %eax - movl %eax, 4(%ebx) - - popl %ebx - ret diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm index b4eb492..2df2bc1 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm @@ -26,6 +26,7 @@ EXTERNDEF PageFaultStubFunction:PROC EXTERNDEF gSmiMtrrs:QWORD EXTERNDEF gcSmiIdtr:FWORD EXTERNDEF gcSmiGdtr:FWORD +EXTERNDEF gTaskGateDescriptor:QWORD EXTERNDEF gcPsd:BYTE EXTERNDEF FeaturePcdGet (PcdCpuSmmProfileEnable):BYTE @@ -252,20 +253,10 @@ gcSmiGdtr LABEL FWORD DD offset NullSeg gcSmiIdtr LABEL FWORD - DW IDT_SIZE - 1 - DD offset _SmiIDT - -_SmiIDT LABEL QWORD -REPEAT 32 - DW 0 ; Offset 0:15 - DW CODE_SEL ; Segment selector - DB 0 ; Unused - DB 8eh ; Interrupt Gate, Present - DW 0 ; Offset 16:31 - ENDM -IDT_SIZE = $ - offset _SmiIDT - -TaskGateDescriptor LABEL DWORD + DW 0 + DD 0 + +gTaskGateDescriptor LABEL QWORD DW 0 ; Reserved DW EXCEPTION_TSS_SEL ; TSS Segment selector DB 0 ; Reserved @@ -720,19 +711,4 @@ PageFaultStubFunction PROC iretd PageFaultStubFunction ENDP -InitializeIDTSmmStackGuard PROC USES ebx -; -; If SMM Stack Guard feature is enabled, the Page Fault Exception entry in IDT -; is a Task Gate Descriptor so that when a Page Fault Exception occurs, -; the processors can use a known good stack in case stack is ran out. -; - lea ebx, _SmiIDT + 14 * 8 - lea edx, TaskGateDescriptor - mov eax, [edx] - mov [ebx], eax - mov eax, [edx + 4] - mov [ebx + 4], eax - ret -InitializeIDTSmmStackGuard ENDP - END diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c index 545b534..45d0335 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c @@ -14,6 +14,30 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include "PiSmmCpuDxeSmm.h" +extern UINT64 gTaskGateDescriptor; + +/** + Initialize IDT for SMM Stack Guard. + +**/ +VOID +EFIAPI +InitializeIDTSmmStackGuard ( + VOID + ) +{ + IA32_IDT_GATE_DESCRIPTOR *IdtGate; + + // + // If SMM Stack Guard feature is enabled, the Page Fault Exception +entry in IDT + // is a Task Gate Descriptor so that when a Page Fault Exception +occurs, + // the processors can use a known good stack in case stack is ran out. + // + IdtGate = (IA32_IDT_GATE_DESCRIPTOR *)gcSmiIdtr.Base; + IdtGate += EXCEPT_IA32_PAGE_FAULT; + IdtGate->Uint64 = gTaskGateDescriptor; } + /** Initialize Gdt for all processors. diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c index fb46551..6a52811 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -118,6 +118,19 @@ InitializeSmmIdt ( EFI_STATUS Status; BOOLEAN InterruptState; IA32_DESCRIPTOR DxeIdtr; + + // + // There are 32 (not 255) entries in it since only processor // + generated exceptions will be handled. + // + gcSmiIdtr.Limit = (sizeof(IA32_IDT_GATE_DESCRIPTOR) * 32) - 1; // + // Allocate page aligned IDT, because it might be set as read only. + // + gcSmiIdtr.Base = (UINTN)AllocatePages + (EFI_SIZE_TO_PAGES(gcSmiIdtr.Limit + 1)); ASSERT (gcSmiIdtr.Base != + 0); ZeroMem ((VOID *)gcSmiIdtr.Base, gcSmiIdtr.Limit + 1); + // // Disable Interrupt and save DXE IDT table // diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S index 2ae6f2c..cd1f19c 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S @@ -128,244 +128,8 @@ ASM_PFX(gcSmiGdtr): .quad NullSeg ASM_PFX(gcSmiIdtr): - .word IDT_SIZE - 1 - .quad _SmiIDT - - -# -# Here is the IDT. There are 32 (not 255) entries in it since only processor -# generated exceptions will be handled. -# -_SmiIDT: -# The following segment repeats 32 times: -# No. 1 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 2 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 3 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 4 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 5 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 6 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 7 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 8 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 9 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 10 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 11 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 12 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 13 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 14 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 15 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 16 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 17 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 18 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 19 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 20 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 21 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 22 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 23 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 24 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 25 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 26 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 27 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 28 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 29 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 30 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 31 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 -# No. 32 - .word 0 # Offset 0:15 - .word CODE_SEL - .byte 0 # Unused - .byte 0x8e # Interrupt Gate, Present - .word 0 # Offset 16:31 - .quad 0 # Offset 32:63 - -_SmiIDTEnd: - -.equ IDT_SIZE, (_SmiIDTEnd - _SmiIDT) + .word 0 + .quad 0 .text @@ -599,12 +363,3 @@ L5: popq %rbp addq $16, %rsp # skip INT# & ErrCode iretq - -ASM_GLOBAL ASM_PFX(InitializeIDTSmmStackGuard) -ASM_PFX(InitializeIDTSmmStackGuard): -# If SMM Stack Guard feature is enabled, set the IST field of -# the interrupt gate for Page Fault Exception to be 1 -# - movabsq $_SmiIDT + 14 * 16, %rax - movb $1, 4(%rax) - ret diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm index ab71645..175f658 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm @@ -144,27 +144,8 @@ gcSmiGdtr LABEL FWORD DQ offset NullSeg gcSmiIdtr LABEL FWORD - DW IDT_SIZE - 1 - DQ offset _SmiIDT - - .data - -; -; Here is the IDT. There are 32 (not 255) entries in it since only processor -; generated exceptions will be handled. -; -_SmiIDT: -REPEAT 32 - DW 0 ; Offset 0:15 - DW CODE_SEL ; Segment selector - DB 0 ; Unused - DB 8eh ; Interrupt Gate, Present - DW 0 ; Offset 16:31 - DQ 0 ; Offset 32:63 - ENDM -_SmiIDTEnd: - -IDT_SIZE = (offset _SmiIDTEnd - offset _SmiIDT) + DW 0 + DQ 0 .code @@ -400,14 +381,4 @@ PageFaultIdtHandlerSmmProfile PROC iretq PageFaultIdtHandlerSmmProfile ENDP -InitializeIDTSmmStackGuard PROC -; -; If SMM Stack Guard feature is enabled, set the IST field of -; the interrupt gate for Page Fault Exception to be 1 -; - lea rax, _SmiIDT + 14 * 16 - mov byte ptr [rax + 4], 1 - ret -InitializeIDTSmmStackGuard ENDP - END diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c index b53aa45..b7300d3 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c @@ -15,6 +15,27 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include "PiSmmCpuDxeSmm.h" /** + Initialize IDT for SMM Stack Guard. + +**/ +VOID +EFIAPI +InitializeIDTSmmStackGuard ( + VOID + ) +{ + IA32_IDT_GATE_DESCRIPTOR *IdtGate; + + // + // If SMM Stack Guard feature is enabled, set the IST field of + // the interrupt gate for Page Fault Exception to be 1 + // + IdtGate = (IA32_IDT_GATE_DESCRIPTOR *)gcSmiIdtr.Base; + IdtGate += EXCEPT_IA32_PAGE_FAULT; + IdtGate->Bits.Reserved_0 = 1; +} + +/** Initialize Gdt for all processors. @param[in] Cr3 CR3 value. -- 1.9.5.msysgit.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
