Hi Mike You are right that IDT is in data section. I did this purposely, because there was requirement to set IDT table to be ReadOnly. MCE handler might run and MCE handler address is there. In order to separate it from other data section, I move it to new place. Or other normal data will also be read only, after I set IDT table to be ReadOnly, because they are all mixed into one data region.
Thank you Yao Jiewen -----Original Message----- From: Kinney, Michael D Sent: Thursday, November 26, 2015 1:16 AM To: Yao, Jiewen; edk2-de...@ml01.01.org; Kinney, Michael D Cc: Fan, Jeff Subject: RE: [patch] UefiCpuPkg/PiSmmCpu: Move IDT to page aligned memory. Jiewen, Why does IDT need to be 4KB aligned? The IDT Base provided in the SmiException.asm and SmiException.S for IA32 and X64 are declared to be in .data sections. As long as the PiSmmCpuDxeSmm driver is built with code/data sections separated and on 4KB boundaries, this should guarantee IDT is in 4KB page with only data. Thanks, Mike > -----Original Message----- > From: Yao, Jiewen > Sent: Tuesday, November 24, 2015 8:51 PM > To: edk2-de...@ml01.01.org > Cc: Yao, Jiewen <jiewen....@intel.com>; Fan, Jeff > <jeff....@intel.com>; Kinney, Michael D <michael.d.kin...@intel.com> > Subject: [patch] UefiCpuPkg/PiSmmCpu: Move IDT to page aligned memory. > > The previous IDT is not in page aligned memory. > We allocate and copy it in page aligned memory, so that other program > may use page level protection on that. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: "Yao, Jiewen" <jiewen....@intel.com> > Cc: "Fan, Jeff" <jeff....@intel.com> > Cc: "Kinney, Michael D" <michael.d.kin...@intel.com> > --- > UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > index 06ffc6d..031a5fe 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > @@ -1218,6 +1218,7 @@ InitializeMpServiceData ( > PROCESSOR_SMM_DESCRIPTOR *Psd; > UINT8 *GdtTssTables; > UINTN GdtTableStepSize; > + VOID *IdtBase; > > // > // Initialize physical address mask @@ -1232,6 +1233,14 @@ > InitializeMpServiceData ( > // > Cr3 = SmmInitPageTable (); > > + // > + // Allocate and Copy because previous IdtBase might not be 4K aligned. > + // > + IdtBase = AllocatePages (EFI_SIZE_TO_PAGES(gcSmiIdtr.Limit + 1)); > + ASSERT (IdtBase != 0); CopyMem (IdtBase, (VOID *)gcSmiIdtr.Base, > + gcSmiIdtr.Limit + 1); gcSmiIdtr.Base = (UINTN)IdtBase; > + > GdtTssTables = InitGdt (Cr3, &GdtTableStepSize); > > // > -- > 1.9.5.msysgit.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
