Laszlo, Jordan, When launching QEMU in Q35 target mode, when writing to IO port 0xB2, the accordingly SMI STS bit (PmBase + 0x34, BIT5) is not set.
Is it a QEMU's bug? I do find comments in OvmfPkg/SmmControl2Dxe/SmmControl2Dxe.c: SmmControl2DxeClear(): ---------------- COMMENTS ------ In fact QEMU automatically deasserts CPU_INTERRUPT_SMI in: - x86_cpu_exec_interrupt() and - kvm_arch_pre_run() Regards, Ray _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
