On Fri, Feb 16, 2018 at 06:34:30PM +0000, Ard Biesheuvel wrote:
> On 16 February 2018 at 17:00, Leif Lindholm <leif.lindh...@linaro.org> wrote:
> > On Thu, Feb 15, 2018 at 05:20:50PM +0000, Ard Biesheuvel wrote:
> >> Add a node for the SPI controller to the device tree so the OS may
> >> attach to it. This is the SPI controller that is attached to the
> >> 96boards mezzanine connector on Developer Box.
> >
> > Just a generic question (which also applies to the subsequent patch):
> > Are there any implications here with regards to this bus running in
> > master or slave mode?
> >
>
> Not really, since that depends entirely on the OS. We just assert the
> presence of a certain IP block at a certain memory offset, and whether
> the hardware supports slave mode is left unspecified. Whether the OS
> supports slave mode (for this particular IP block) is not a property
> of the hardware.
I was thinking more along the lines of whether the hardware supports
slave mode or not (perhaps as a synthesis option).
But, fair enough.
If you change SynQuaver -> SynQuacer in 1-2 subject lines, for the series:
Reviewed-by: Leif Lindholm <leif.lindh...@linaro.org>
> >> Contributed-under: TianoCore Contribution Agreement 1.1
> >> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> >> ---
> >> Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 18
> >> ++++++++++++++++++
> >> 1 file changed, 18 insertions(+)
> >>
> >> diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> >> b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> >> index 9085adb326ab..ba445a50f16f 100644
> >> --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> >> +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
> >> @@ -538,4 +538,22 @@
> >> clock-names = "core", "iface";
> >> dma-coherent;
> >> };
> >> +
> >> + clk_alw_1_8: spi_ihclk {
> >> + compatible = "fixed-clock";
> >> + #clock-cells = <0>;
> >> + clock-frequency = <125000000>;
> >> + clock-output-names = "iHCLK";
> >> + };
> >> +
> >> + spi: spi@54810000 {
> >> + compatible = "socionext,synquacer-spi";
> >> + reg = <0x0 0x54810000 0x0 0x1000>;
> >> + clocks = <&clk_alw_1_8>;
> >> + clock-names = "iHCLK";
> >> + socionext,use-rtm;
> >> + socionext,set-aces;
> >> + #address-cells = <1>;
> >> + #size-cells = <0>;
> >> + };
> >> };
> >> --
> >> 2.11.0
> >>
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