On 28 August 2014 20:57, Laszlo Ersek <[email protected]> wrote:
> The FDF under review follows exactly scheme 2. The FD starts with a DATA
> region that starts with a manually encoded branch instruction to 0x1000.
> The DATA region encodes this branch instruction in 4 bytes, and the rest
> (4092 byes) come from the ErasePolarity-matching padding.
>
> The FV is indeed offset into the FD with 0x1000 bytes, starting right
> after the DATA region.
>
> As you say, the build system (apparently) patches the start of the FV
> itself (which is located at offset 0x1000 in the FD) so that it branches
> to the SEC entry point. Hence I think this "double trampoline" that you
> described is exactly the case.
>
> What Peter suggested (I think) is that we build a complete exception
> vector table in those 4092 bytes, past the 4-byte long reset vector at
> 0x0. And, in addition to the exception vector table, even a simple
> exception handler routine should be implemented there (in assembly of
> course), referenced by the vectors, that dumps the exception details to
> the virtual serial port (or some QEMU-specific MMIO debug register etc).

Well, it's up to you how much you want to put in assembly and exactly
where you want to put the assembly. You could have all the vector table
entries be single-instruction jumps into your FV, same way you
deal with the reset vector. I just expected to see *something* valid in the
other entries in the initial vector table. Most of the rest of my remarks
are based on the assumption that you're generating the start of your
binary blob in the obvious way, ie by running something through
an assembler to get an object file and eventually a hex blob that
your build system assembles into the start of the rom image.

-- PMM

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