On 22 February 2015 at 02:19, Laszlo Ersek <[email protected]> wrote:
> So, before I try to reason more about code that's potentially not
> covered by this patch, let me ask this -- is it conceivable that in the
> following:
>
>     //
>     //                   child base      cpu base
>     //        type       address         address         size
>     //        ---------  --------------  --------------  --------------
>     ranges = <0x1000000  0x0        0x0  0x0 0x3eff0000  0x0    0x10000
>               0x2000000  0x0 0x10000000  0x0 0x10000000  0x0 0x2eff0000>;
>
> the "child base address" would *ever* be different from the "cpu base
> address" for the PCI MMIO32 type range (0x2000000)?

It's certainly permissible, it just means the MMIO window is showing
you a different bit of PCI MMIO space. IIRC ARM Linux doesn't really
support this case without adding a lot of extra "iommu" complexity,
and 1:1 is how x86/PC does its pci mapping, which is why we've set
it up this way in the virt board, but the DTS format certainly allows
you to describe other things.

On the subject of mapping, note that the CPU address -> PCI
mmio address is not necessarily the same as the PCI dma
address -> CPU address mapping (though it is in this case).
I'm not sure the dts bindings let you say this, though.

-- PMM

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