All POWER_MGMT_REGISTER_PIIX4() macro invocations in OvmfPkg should use
the macros in "I440FxPiix4.h" as arguments.

Cc: Gabriel Somlo <so...@cmu.edu>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <ler...@redhat.com>
---
 OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c    | 7 +++----
 OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c | 9 ++++-----
 OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c     | 2 +-
 OvmfPkg/Library/PlatformBdsLib/BdsPlatform.c       | 2 +-
 OvmfPkg/PlatformPei/Platform.c                     | 6 +++---
 5 files changed, 12 insertions(+), 14 deletions(-)

diff --git a/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c 
b/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c
index c20f299..490cf80 100644
--- a/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c
+++ b/OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c
@@ -22,7 +22,6 @@
 // Power Management PCI Configuration Register fields
 //
 #define PMBA_RTE      BIT0
-#define PIIX4_PMIOSE  BIT0
 
 //
 // Offset in the Power Management Base Address to the ACPI Timer
@@ -58,9 +57,9 @@ AcpiTimerLibConstructor (
   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
   switch (HostBridgeDevId) {
     case INTEL_82441_DEVICE_ID:
-      Pmba       = POWER_MGMT_REGISTER_PIIX4 (0x40);
-      AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (0x80); // PMREGMISC
-      AcpiEnBit  = PIIX4_PMIOSE;
+      Pmba       = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
+      AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMREGMISC);
+      AcpiEnBit  = PIIX4_PMREGMISC_PMIOSE;
       break;
     case INTEL_Q35_MCH_DEVICE_ID:
       Pmba       = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
diff --git a/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c 
b/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c
index 55f3572..50a3391 100644
--- a/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c
+++ b/OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c
@@ -23,7 +23,6 @@
 // Power Management PCI Configuration Register fields
 //
 #define PMBA_RTE      BIT0
-#define PIIX4_PMIOSE  BIT0
 
 //
 // Offset in the Power Management Base Address to the ACPI Timer
@@ -56,9 +55,9 @@ AcpiTimerLibConstructor (
   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
   switch (HostBridgeDevId) {
     case INTEL_82441_DEVICE_ID:
-      Pmba       = POWER_MGMT_REGISTER_PIIX4 (0x40);
-      AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (0x80); // PMREGMISC
-      AcpiEnBit  = PIIX4_PMIOSE;
+      Pmba       = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
+      AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMREGMISC);
+      AcpiEnBit  = PIIX4_PMREGMISC_PMIOSE;
       break;
     case INTEL_Q35_MCH_DEVICE_ID:
       Pmba       = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
@@ -114,7 +113,7 @@ InternalAcpiGetTimerTick (
   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
   switch (HostBridgeDevId) {
     case INTEL_82441_DEVICE_ID:
-      Pmba = POWER_MGMT_REGISTER_PIIX4 (0x40);
+      Pmba = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
       break;
     case INTEL_Q35_MCH_DEVICE_ID:
       Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
diff --git a/OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c 
b/OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c
index 649b5c9..0c42ed2 100644
--- a/OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c
+++ b/OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c
@@ -61,7 +61,7 @@ AcpiTimerLibConstructor (
   HostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId);
   switch (HostBridgeDevId) {
     case INTEL_82441_DEVICE_ID:
-      Pmba = POWER_MGMT_REGISTER_PIIX4 (0x40);
+      Pmba = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
       break;
     case INTEL_Q35_MCH_DEVICE_ID:
       Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
diff --git a/OvmfPkg/Library/PlatformBdsLib/BdsPlatform.c 
b/OvmfPkg/Library/PlatformBdsLib/BdsPlatform.c
index 2521ea4..1eb2a8b 100644
--- a/OvmfPkg/Library/PlatformBdsLib/BdsPlatform.c
+++ b/OvmfPkg/Library/PlatformBdsLib/BdsPlatform.c
@@ -860,7 +860,7 @@ PciAcpiInitialization (
   mHostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId);
   switch (mHostBridgeDevId) {
     case INTEL_82441_DEVICE_ID:
-      Pmba = POWER_MGMT_REGISTER_PIIX4 (0x40);
+      Pmba = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
       //
       // 00:01.0 ISA Bridge (PIIX4) LNK routing targets
       //
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index 4ce358c..1126c65 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -252,9 +252,9 @@ MiscInitialization (
   switch (HostBridgeDevId) {
     case INTEL_82441_DEVICE_ID:
       PmCmd      = POWER_MGMT_REGISTER_PIIX4 (PCI_COMMAND_OFFSET);
-      Pmba       = POWER_MGMT_REGISTER_PIIX4 (0x40);
-      AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (0x80); // PMREGMISC
-      AcpiEnBit  = BIT0; // PIIX4_PMIOSE
+      Pmba       = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
+      AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMREGMISC);
+      AcpiEnBit  = PIIX4_PMREGMISC_PMIOSE;
       break;
     case INTEL_Q35_MCH_DEVICE_ID:
       PmCmd      = POWER_MGMT_REGISTER_Q35 (PCI_COMMAND_OFFSET);
-- 
1.8.3.1



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