> On Jun 22, 2015, at 12:09 AM, Jeyaraman Sundararajan (jeysunda)
> <jeysu...@cisco.com> wrote:
>
> Hi
> We have a requirement to fix the reset vector code at FFFE_FFFF instead of
> the default FFFF_FFFF. How to set the upper address in build tools so that
> all SEC/PEI modules will be relocated based on the new Top of address.
>
If this is x86, is your reset vector really at 0xFFFEFFF0? Or is you chipset
inverting an address bit?
1) The question you asked the reset vector is @ 0xFFFEFFF0
You just move the FV with the SEC so that it ends @ 0xFFFEFFFF.
The SEC has a “magic” file name GUID, call volume top, and the tools will
always pack this file at the very end of the FV.
2) If you chipset is inverting BIT16, but expecting the reset vector to be
0xFFFEFFF0
The edk2 build system does not support this kind of TopSwap.
What you do is:
Map the FV with the SEC from 0xFFFF0000 - 0xFFFFFFFF.
Have a fake region from 0xFFFE0000 - 0xFFEFFFF in the FD flash map.
Use a post processing tool to patch the value of the last 64K of the FD into
the previous 64K.
Thanks,
Andrew Fish
> Thanks
> Jeyaram
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