Performance depends on if you are doing everything is userland or in the 
kernel.  For a good overview of BeagleBone performance with driving servos:

http://veter-project.blogspot.com/2011/09/real-time-enough-about-pwms-and-shaky.html

They eventually settled on using Xenomai with a kernel driver for realtime GPIO 
toggling, but using the PRU directly is a more efficient route that doesn't 
require RT_PREEMPT or Xenomai IMHO.

________________________________________
From: Jon Elson [el...@pico-systems.com]
Sent: Wednesday, February 06, 2013 12:52 PM
To: EMC developers
Subject: Re: [Emc-developers] BeagleBone question

On 02/06/2013 07:59 AM, Charles Steinkuehler wrote:
> The GPIO pins can be written by the 700+ MHz ARM CPU, but they
> apparently don't track changes that fast. Really, how deterministic
> the pin updates can be seems more important than the ultimate
> frequency, at least for step/dir control.
Yes, TI is very tight about how this works, but it is fairly obvious the
GPIO has very simple
logic at the pads, mostly a pullup and pulldown resistor and switch, a
FF with tri-state
driver and a receiver.  Then, they have a multiplexed logic component
that handles
32 bits at a time, and sequentially processes each GPIO bank.  On the
OMAP3430 (I
think that is the right part number for the Beagle Board) this is done
every 240 ns.

There are also some bus bridges between the CPU and GPIO, so maybe that
is where the
240 ns delay is.

I don't understand the reason for this multiplexing, it doesn't seem
that it would save very
much area or power.  But, with a 700+ MHz CPU, it is a bottleneck for
embedded control
applications.

Jon

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