%> %>Max writes: %> %>> critical spacing distances that he recommended. With the cap connected %>> directly to VCC and ground, he also suggested a layout where traces go %>> some distance before they are connected to the DC power and return planes.
Dan writes, %> %>Did Dr. Van Doren suggest that Vcc and Gnd traces should travel some %>distance or that some distance was tolerable but should be kept to a %>minimum? Everything I've ever heard, read, or experienced has taught me %>to avoid any additional inductance created by traces travelling further %>than necessary. Sure, you could get lucky and have the inductance of %>the trace solve a problem for you at one particular frequency, but %>in practice that extra inductance is a BAD thing. %> This really isn't a simple situation. Typically, the problem that you have with EMC experts and consultants (in my opinion) is that either they don't have all the answers, or they don't provide a detailed explanation because of the complexities involved, or perhaps they don't want to tell everything they know. In any case there is, obviously, more work to be done in studying bypass capacitors--both from an EMC point of view and a transient response point of view because of the new power saving technology incorporated into some of the new low voltage IC's and microprocessors. >From a basic point of view, though, capacitors can serve two completely different functional requirements: Decoupling and filtering. After that, decoupling functions can probably be broken down into at least 3 different areas. In this situation, we are really talking about circuit level decoupling and not filtering. However, there might be some filtering issues involved here also. If there are, though, they would further complicate things. In general the conclusion that Van Doren of the University of Missouri-Rolla and McCune have arrived at is that a series impedance be added to the tap off the power plane and a decoupling capacitor be provided to provide the transient response requirements. Beyond that they haven't provided any details. So, if we take this at face value then we would probably want to maximize the AC impedance while making sure the DC drop was tolerable. In that case you could maximize (not minimize) the length of the traces with the limiting factor being only the IR drop. So, there is no luck involved. If you look at it from this point of view, we are not trying to do anything that is dependent on resonance effects, etc. However, in the real world, you do have the problem of charging up the battery again (capacitor) before the IC needs the next current surge. Obviously this will require some transient (di/dt) current to flow acrossed the impedance. Presumably, this transient would be many times slower than the current transient drawn as a result of the IC's switching activities. In otherwords, the time that a device is high should always be longer than the rising edge of the waveform. Still, since there is going to be some transient (hopefully much slower), involved with refilling the cap, we would want to minimize the size of this loop also--even if it's not connected to the power or ground plane. This line of reasoning seems to lead one to a preference towards McCune's method of using discrete devices, instead of a trace, to provide the impedance. Then logically, we would want to put another capacitor on the otherside of the (ferrite) to provide the secondary current and further reduce the size of the loop. The trade off, then would be that one method requires the use of discrete components while the other one can be implemented by manipulating the trace length. The deciding factor would be whether the secondary current loop is an EMI problem. Max [email protected]
