%>
%>     
%>     Hi Ladies/Gentlemen,
%>     
%>     I have been reading with interest the discussion articles on this 
%>     subject. Since Mike Violette 04/15/96 presented his opinion on VCC/GND 
%>     plane layout in multilayer board, the discussion seems to be focused 
%>     on PCB EMC design.  Max Kelson 04/16/96 wrote: 
%>     
%>     [snip]
%>     What this ferrite/cap configuration would do is to force the  
%>     oscillator to draw all transient current from the capacitor.  Or, in  
%>     otherwords, the rest of the caps on the board would be unable to  help 
%>     provide fast-transient current because of the ferrite.  This  would 
%>     keep the current loop (power AND GROUND) small and prevent it  from 
%>     infecting the rest of the board.  The path for the transient  current 
%>     surges would be from the capacitor to the IC's power pin,  out the 
%>     IC's ground pin and back to the negative side of the  capacitor (a 
%>     relatively small loop). 
%>     [snip]
%>     
%>     
%>     It might be worthwhile to pay attention to research work done by 
%>     professors at the Univ. of Missouri-Rolla. In the article "Power Bus     
  
%>     Decoupling on Multilayer Printed Circuit Board", IEEE Trans. on EMC, 
%>     vol. 37, pp. 155-166, May 995, they wrote:
%>     
%>     [snip]
%>     VI. Conclusion.
%>     Unlike boards without internal power and ground planes, multilayer 
%>     boards have a built-in capacitance that is a more effective source of 
%>     current than surface decoupling capacitors at high frequencies. In the 
%>     time-domain, this means that most of the initial current supplied to a 
%>     fast switching device is provided by the interplane capacitance.
%>     [snip]
%>     
%>     
%>     Regards,
%>     Barry Ma
%>     
%>     

I attended an EMC seminar conducted by Dr. Tom Van Doren on June 8, 1992
and then another one on March 23, 1995 by Dr. Van Doren, entitled
"Circuit Board Layout to reduce Electromagnetic Emission and
Susceptibility.  It was amazing how much progress Dr. Van Doren had made
on the general subject of controlling EMC on the board level between the
two dates.

In this seminar the importance of a low Zo with the DC power bus was
discussed extensively and there was a lot of information on bypass
capacitors also.  These two subjects are really the leading edge topics
for EMC control in the 90's, I think.  

One idea that Dr. Van Doren suggested during the seminar was to connect
the bypass caps directly to the VCC and ground pins.  This suggestion was
given with the caveat that the physical geometries be within some
critical spacing distances that he recommended.  With the cap connected
directly to VCC and ground, he also suggested a layout where traces go
some distance before they are connected to the DC power and return planes.

So, in otherwords, Dr Van Doren, an EMC professor, and Earl McCune, an RF
communications consultant [1] have essentially arrived at the same
conclusion, I think.  They are both suggesting that the loop be minimized
with a bypass capacitors and that a series impedance be added in the tap
off the power plane.  The only difference is that McCune recommends the
use of a resistor, a low-Q inductor or a ferrite while Van Doren suggests
using the natural impedance of circuit board traces to provide the
impedance.  

The question that remains unanswered, I think, is at what
frequencies is this method effective and will the capacitors be fast
enough to provide the current, etc.  This is an issue that needs a lot of
research and one of the big problems is the dynamics in the capacitor
industry and the lack of appropriate capacitor specifications.  Dr. Van
Doren, for example, provides some sample ESL figures, in one of his
calculations, of 30 nH.  In other calculation, he uses 100 nH.  However,
I don't think he is aware that there is at least one leading edge
manufacturer (AVX) that is providing SMT MLC's with very low ESR's and
ESL's.  As I recall AVX makes some of these capacitors with ESL's as low
as about 0.7 nH.

Ultimately, I think the answer has to be to use these low inductance caps
to provide for an IC's high (relatively speaking) transient current
requirements and use built-in caps to provide the higher frequency, lower
current requirements (as mentioned previously).

I highly recommend Dr. Van Doren's seminars, BTW.  The information that
he provides is new, and interesting and exciting.  Dr. Van Doren,
incidently, provides his email address in his seminar book and, as I
recall, I did send him one question once and got a polite and prompt
response.


Max
[email protected]

Max Kelson
Peripherals Engineer
Evans & Sutherland Computer Corp.



[1] "Ground-Current Control Enhances Dynamic Range in High-Speed
    Circuits, Earl McCune, MSEE, RF Communications Consulting,
    EDN, January 19, 1995.

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