Very good observations, Jack. I agree 100% with your comments on the perils of slicing up ground planes.
As I write this, I am looking at a CE marked ethernet PCI card by an unnamed source that is failing +5dB over EN 55022 CLASS A at the open field site. It has a row of 10 vias next to the main oscillator that cut a nice 5/8" slot through all board planes. The failing frequencies are harmonics of that oscillator. The also vendor appears to be using guardbanding around traces which they consider critical. The guardbands are 5" long complete loops of trace surrounding the critical trace (presumably clock lines). The guardbands are returned to logic ground by one via at one end which is "T'd" off of multiple guardband loops. Other guardbands have short stubs which don't connect to anything. My loop probe shows hot spots at the failing frequencies in the vicinity of these board features. It is bad enough that the clocks are on an external layer, but surrounding them with closed loop, essentially unreferenced (except for parasitics) trace is really asking for it. This is a typical example of poor implementation of a sound EMC design concept. These problems may not be the issue with this particular product, but you can bet I will point them out to the vendor as points of concern. I'd love to see how this product was qualified! Regards, [email protected] ---------- From: JCook.El_Segundo To: Tony_Fredriksson Cc: emc-pstc Subject: Re: RFI problems with PC's ... List-Post: [email protected] Date: Wednesday, April 17, 1996 11:43AM This discussion of board design is interesting, especially regarding the pros & cons re creating islands. I've done it but have rarely had the opportunity to compare one technique against another, at least not conclusively. Wouldn't it be great if we, as EMC engineers, had unlimited time & money to actually prove ideas right or wrong! One factor has to be made clear when you write about islands - that is, if the ground plane is also being broken. In my experience, that's a major step which can change things drastically - for better or for worse. Creating an island in the VCC plane (eg, coupled with a ferrite) is common and beneficial if done properly (for reasons I think Tony already stated), but I *rarely* cut the ground plane, at least not on purely logic boards. In fact, I've learned the hard way to look carefully for unintentional slotting of ground planes; eg, those slots caused by a line of through-hole pins or vias with overlapping clearance holes (easy to miss). That can be bad news when there's etch passing over that slot. On the other-hand, I've seen cases where intentional slots, intelligently placed, solved problems. The bottom line is that there are a LOT of factors to consider and many are conflicting. You can focus too much on one & create even worse problems elsewhere. Creating islands CAN create problems ( as someone said) as well as solve them so you have to make a judgement call & take your best shot. That's why we get paid so much money! :-) All this goes double for the question of grounding PWB's to the chassis or frame. There's a "gotcha" at every corner. Jack Cook Xerox Corp email: [email protected]
