Hi All,

The advice about being near the gound end of the circuit really applies to
one shot, time domain, impulse measurements, ESD/EFT/Surge.

I agree with the sliding over the cable in max hold and have been doing
that for years. In this case, the location of max currents is also the low
impedance points along the cable, so the effect of the current probe is
minimum (at least from a parasitic capacitance point of view). At other
points there may be errors, but you probably don't care since you are
looking for the max currents. Sort of Murphy's law in reverse.

Doug (at work address)


At 10:10 AM 6/21/99 -0700, Jim Eichner wrote:
>
>In his write up of the problem, Doug writes
>
>"If possible, current probes should be positioned on the measured cable
>so as to minimize the potential between the cable and the current probe
>body. This usually means locating the probe near the ground/chassis end
>of a circuit."
>
>Following a tip from someone on this forum quite a while ago, I have
>observed significant variation in the spectrum of noise along the length
>of a cable.  I have started doing my cable current measurements by
>sliding the probe over the length of the cable, with my spectrum
>analyzer in max hold mode.  I assume I get a "worst case sweep" by doing
>this, as I pick up the worst of everything at any position on the cable.
>
>
>Following Doug's advice above, or any instance of using a current probe
>in a single fixed position, could result in the probe being positioned
>right at a null for a frequency of interest, sending you on a wild goose
>chase looking for some other source.  
>
>Does Doug or anyone else have similar experience or a better way to
>overcome the problem?
>
>Regards,
>
>Jim Eichner
>> Senior Regulatory Compliance Engineer
>Statpower Technologies Corporation
>[email protected]
>http://www.statpower.com
>Any opinions expressed are those of my invisible friend, who really
>exists, but can only be seen by my dog.  Honest.
>
>
>
>
>
>
>
>> -----Original Message-----
>> From:        [email protected] [SMTP:[email protected]]
>> Sent:        Monday, June 21, 1999 9:48 AM
>> To:  EMC-PSTC
>> Subject:     Fw: Current probe problem
>> 
>> 
>> Posted for Doug Smith:
>>  
>>  
>>  
>>  
>>  
>> 
>> 
>> ------------------------
>>   From: [email protected]
>>   Subject: Current probe problem
>>   Date: 18 Jun 1999 20:38:04 -0700 
>>   To: [email protected]
>> 
>> 
>> > I have posted an interesting current probe measurement
>> configuration/problem on my website at http://emcesd.com. The picture
>> is at the bottom of the main index page. Click on the picture to see
>> the answer.
>> > 
>> > Has anyone else run into problems involving parasitic capacitance
>> between a current probe and the circuit being measured?
>> > 
>> > Doug
>> > 
>> > --------------------------------------------------------------------
>> >     ___          _                    Douglas C. Smith
>> >      \          / )                   P. O. Box 1457
>> >       =========                       Los Gatos, CA 95031
>> >    _ / \     / \ _                    TEL/FAX: 408-356-4186/358-3799
>> >  /  /\  \ ] /  /\  \                  Email1: [email protected]
>> > |  q-----( )  |  o  |                 Email2: [email protected]
>> >  \ _ /    ]    \ _ /                  Email3: [email protected]
>> > --------------------------------------------------------------------
>> > 
>> > 
>> 
>> ---------------End of Original Message-----------------
>> 
>> --------------------------
>> Ed Price
>> [email protected]
>> Electromagnetic Compatibility Lab
>> Cubic Defense Systems
>> San Diego, CA.  USA
>> 619-505-2780
>> Date: 06/21/1999
>> Time: 08:47:46
>> Military & Avionics EMC Services Our Specialty
>> Also Environmental / Metrology / Reliability
>> --------------------------
>> 
>> 
>> 
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