I make them ground it with appropriately spaced vias.
-----Original Message-----
From: Perry Qu [mailto:perry...@alcatel.com]
Sent: Thursday, January 18, 2001 4:19 PM
To: Roman, Dan
Cc: 'Stephen Phillips'; rehel...@mmm.com; emc-p...@majordomo.ieee.org;
DORIN OPREA
Subject: Re: Copper Thieving
Hi! Dan:
I understand that EMC guys don't want to see the floating coppers on the PCB
because of ESD and/or emission problem. But on the manufacture side, they
claim
that if you don't do copper balance on the layer where you have large area
without copper, you will sure have over-eching in that area, plus warpage of
the
board.
The question is, where do we find a compromised solution that makes everyone
happy ?
Regards
Perry
-------------------------------------------
This message is from the IEEE EMC Society Product Safety
Technical Committee emc-pstc discussion list.
To cancel your subscription, send mail to:
majord...@ieee.org
with the single line:
unsubscribe emc-pstc
For help, send mail to the list administrators:
Jim Bacher: jim_bac...@mail.monarch.com
Michael Garretson: pstc_ad...@garretson.org
For policy questions, send mail to:
Richard Nute: ri...@ieee.org
