Thanks for responding Chris The question boils down to this: In the second edition of UL61010A-1 (clone of EN61010-1 2nd edition?) section 6.7.3.1 subsection b-1 (sorry if I have the wrong reference number, this is by memory - not at work) or section D.5 of the old standard. There are some provisions for reducing C&C based on filtering. What I don't understand is how to determine the reduced transient limit Ut. Does one determine Ut by empirical measurement and witness tests or ??? Also, as you have been eluminating, how one would use this clause in a design relative to high pot etc. I asked my UL contact and they have never had anyone ask - will get back to me. I figure that designers run into this and give up falling back to the conservative approach. Without better understanding, that is what I am doing and will just bite the bullet putting in double basic isolation. I see we have generated a good thread - haven't read them yet. Perhaps there is a gem in there.
Regards Chris Wells ----- Original Message ----- From: "Chris Maxwell" <[email protected]> To: "Chris Wells" <[email protected]>; "emc-pstc" <[email protected]> Sent: Tuesday, February 10, 2004 9:05 AM Subject: RE: IEC61010-1 multiple Overvoltage catagories in one circuit??? > Chris, > > The installation overvoltage category is really only defined at the input to your product. In my humble opinion, thinking about the “overvoltage category” of different parts of your circuitry will probably confuse you more than help you. > > It seems to me that you first need to establish what input overvoltage category your product will be classified as. Once that is done, you need to meet all of the safety requirements (hi-pot, creepage, clearance…) for that overvoltage category. So, my recommendation is that you consider the input overvoltage levels that your input will be subjected to and work from there. > > What I’m understanding from your message is that you have some substantial filtering at the input, which will knock down any surges at the input. Based upon this filtering, it seems that you want to reduce either the creepage, clearance or insulation requirements for circuits after the input filtering. I think (opinion only) that you will be able to do this to some extent; but you will really need to be careful in your design. > > I have done this in a couple of designs to a limited extent; and this is what I can tell you: > > 1. You need to consider single faults (of course). If you are depending upon a single surge suppressor to knock down the hi-pot voltage; you’re cooked. This surge suppressor will be open circuited as a single fault condition at the lab. Same thing with a CM choke, it can be short circuited as a single fault condition. > > 2. In EN 61010-1, you should look through the clauses on “Protective Impedance”; since this is the closest definition of what you’re trying to do. > > 3. Remember that suppression devices from line or neutral to safety ground have limited applicability. Many labs will not accept MOVs placed >from line or neutral to safety ground, due to leakage current and aging problems with MOVs. You can put a gas tube in series with the MOV. I have seen TVS, type devices that are approved for line and/or neutral to ground applications. I couldn’t use them. They were too big for my application, about the size of a small rodent ☺ > > 4. Before you commit to your design. Identify the "compromised" locations that have either: tight clearances, insufficient creepage and/or insufficient insulation. What would happen if these locations were short circuited? Would a hazardous condition arise? If so, then you have cause for concern. One of the tests performed by the lab in order to evaluate your unit may be to short circuit these locations and see what happens. > > 5. You may need to consider application of an approved conformal coating by an approved applicator to either a limited section of your board or the entire board. > > 6. I would recommend cooperating with your chosen lab up front on this one; because you need to know how they would test your circuit. This type of design would require the lab to prove the safety of certain portions of your design by testing, as opposed to inspection. As such, this type of testing brings out subtle differences in how each lab evaluates a test sample. An easy way to do this would be to have them review the PCB layout before you commit to buying boards. > > Hope I've helped. > > Chris Maxwell > Design Engineer > Nettest, Utica, NY > > > > This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ieee-pses.org/ To cancel your subscription, send mail to: [email protected] with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Ron Pickard: [email protected] Dave Heald: [email protected] For policy questions, send mail to: Richard Nute: [email protected] Jim Bacher: [email protected] All emc-pstc postings are archived and searchable on the web at: http://www.ieeecommunities.org/emc-pstc
