George,
the 1/6 rule-of-thumb looks decent in simulation. That is, the propagation
delay through the stub must be less than 1/6 the signal rise time. So if you
have a 600 ps rise time you will want the stub to be less than 100 ps (about
15 mm).
One issue that is sometimes overlooked with stubs is that they can "tune" the
circuit and increase (or decrease) emissions at certain frequencies by
changing the load seen by the IC output driver. For example, say you have a 2
cm microstrip stub. The propagation delay is about 120 ps. It is a 90-degree
line at 2.1 GHz. The IC output driver sees a zero-ohm load at 2.1 GHz and the
package current is high and can give rise to increased emissions at this
frequency.
Dave Cuthbert
Micron Technology
_____
From: [email protected] [mailto:[email protected]] On Behalf Of
George Stults
Sent: Wednesday, June 29, 2005 1:29 PM
To: [email protected]
Subject: ICT test points on clock lines
Hi folks,
Does anyone have any thoughts (from an EMI/EMC standpoint) for or against
adding ICT test points to traces such as differential pairs, clocks and data
busses?
Leaving them off seems preferable, however, assuming they have to be there, my
thoughts would be:
1) If the test points are placed close together, they can cut (create slots
in) planes leading to increased emissions
2) Test points should be placed symmetrically on a differential pair to
maintain cancellation of fields
Above what frequency would test points as short stubs start to cause problems
with signal integrity?
Thanks
George S.
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