George,
I think that as a practical matter, ICT test points are unlikely to cause EMI/EMC problems, unless there is some egregious cluster of them and their reference plane antipads disrupt some signal or clockâs return current path. Via stubs are more of a problem on thick boards than on thin boards. Hence, backpanels will show signal integrity problems at lower frequencies than daughter cards. Generally speaking, backpanel via stubs could exhibit open stub resonances in the 5 GHz, or above range. Daughter cards with thicknesses in the 62 mils range will show any open stub resonances above 10 GHz. So, I think you must be operating at high frequencies for the via stub issue to be a severe one. With a differential pair, maintaining balance is important. So, placing test points at approximately the same points on each side of a differential pair is good practice. Jim Knighten _____________________ James L. Knighten, Ph.D. Teradata, a division of NCR http://www.ncr.com 17095 Via del Campo San Diego, CA 92127 tel: 858-485-2537 fax: 858-485-3788 _____ From: [email protected] [mailto:[email protected]] On Behalf Of George Stults Sent: Wednesday, June 29, 2005 12:29 PM To: [email protected] Subject: ICT test points on clock lines Hi folks, Does anyone have any thoughts (from an EMI/EMC standpoint) for or against adding ICT test points to traces such as differential pairs, clocks and data busses? Leaving them off seems preferable, however, assuming they have to be there, my thoughts would be: 1) If the test points are placed close together, they can cut (create slots in) planes leading to increased emissions 2) Test points should be placed symmetrically on a differential pair to maintain cancellation of fields Above what frequency would test points as short stubs start to cause problems with signal integrity? Thanks George S. ---------------------------------------------------------------- This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. Website: http://www.ieee-pses.org/ To post a message to the list, send your e-mail to [email protected] Instructions: http://listserv.ieee.org/listserv/request/user-guide.html List rules: http://www.ieee-pses.org/listrules.html For help, send mail to the list administrators: Scott Douglas [email protected] Mike Cantwell [email protected] For policy questions, send mail to: Richard Nute: [email protected] Jim Bacher: [email protected] All emc-pstc postings are archived and searchable on the web at: http://www.ieeecommunities.org/emc-pstc ---------------------------------------------------------------- This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. Website: http://www.ieee-pses.org/ To post a message to the list, send your e-mail to [email protected] Instructions: http://listserv.ieee.org/listserv/request/user-guide.html List rules: http://www.ieee-pses.org/listrules.html For help, send mail to the list administrators: Scott Douglas [email protected] Mike Cantwell [email protected] For policy questions, send mail to: Richard Nute: [email protected] Jim Bacher: [email protected] All emc-pstc postings are archived and searchable on the web at: http://www.ieeecommunities.org/emc-pstc
