Hi folks,
Does anyone have any thoughts (from an EMI/EMC standpoint) for or against adding ICT test points to traces such as differential pairs, clocks and data busses? Leaving them off seems preferable, however, assuming they have to be there, my thoughts would be: 1) If the test points are placed close together, they can cut (create slots in) planes leading to increased emissions 2) Test points should be placed symmetrically on a differential pair to maintain cancellation of fields Above what frequency would test points as short stubs start to cause problems with signal integrity? Thanks George S. ---------------------------------------------------------------- This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. Website: http://www.ieee-pses.org/ To post a message to the list, send your e-mail to [email protected] Instructions: http://listserv.ieee.org/listserv/request/user-guide.html List rules: http://www.ieee-pses.org/listrules.html For help, send mail to the list administrators: Scott Douglas [email protected] Mike Cantwell [email protected] For policy questions, send mail to: Richard Nute: [email protected] Jim Bacher: [email protected] All emc-pstc postings are archived and searchable on the web at: http://www.ieeecommunities.org/emc-pstc
