The EMC directive is not about hazardous malfunctions, but
about functional immunity only.
The END-user construction seems to me fully not applicable.
If the definition had something to do with engineers capable of
handling unwanted emissions, if would haven bee formulated like that,
in addition if there is one category of engineers that don't know
about EMI then it is a certainly digital designer, the target audience for
this kind of device.
I think the real reason for this exception going unnoticed is simply
because they are shipped in small quantities (1 at a time).
I now and then buy Ebay stuff from the far-east without any
ce marking and it arrives always, in spite of clearly
not being tested/ce marked or compliant.
To Piotr: ESD test are normally carried out on enclosure
and connector shielding, not to internal circuits.
HCP and VCP discharge are designed for this.
If a device carries a ce mark, it is supposed to
comply with all applicable directives, for a piece
of electronics that definitely includes the EMC
directive in ALL cases (if not clearly exempted).
The Farnell answer will never come, because there is no such
answer. It's a see, hear, and shut-up clause.
But that works only for Farnell, Intel , Motorola
etc. If you have a small company forget it.
You will be sued and obliged to withdraw all
the stuff until you are broke.
The best approach is like the PLT stuff.
Start developing a standard with virtual limits
based on unsound testing techniques, and convince
the EC commission that your product will change the
way we live and open new ways of interacting
together.("Apple talk")
Regards,
Ing. Gert Gremmen, BSc
[email protected]
www.cetest.nl
Kiotoweg 363
3047 BG Rotterdam
T 31(0)104152426
F 31(0)104154953
Before printing, think about the environment.
-----Oorspronkelijk bericht-----
Van: John Woodgate [mailto:[email protected]]
Verzonden: Monday, October 28, 2013 10:38 PM
Aan: [email protected]
Onderwerp: Re: [PSES] EMC requirements for developer/evaluation boards
In message
<caey+zhng2vxxykmy11nygckz5mgxk9jenkahdj2khnewuyn...@mail.gmail.com>,
dated Mon, 28 Oct 2013, EMC Guy <[email protected]> writes:
>I've looked at that Intel webpage disclaimer, and it really looks like
>something invented by their legal department to get out of EMC-testing
>their eval boards.
It isn't worded in a way I would recommend. I did tell you that getting a
straight answer from anyone on this issue seems to be impossible: it's firmly
in the 'too difficult' folder.
>
>Still not sure what decision to make on this one. Designing a board to
>pass EMC tests (yes, including ESD!) without a metal enclosure might
>not be easy or even possible in some cases, so we might just take our
>chances and do what Intel and others do: mark it CE for RoHS II, and
>include a big disclaimer that the board is intended for engineers who
>will use their own judgment to mitigate possible EMC issues
You need to be very careful with the wording. If the product is extremely
unlikely to produce significant emissions, say so. If it would be best to use
shielded cables, put that in the product documents.
It's very unlikely that regulatory authorities would be concerned about
immunity issues UNLESS the product is something like a motor controller, where
a lack of immunity could cause hazardous malfunction.
--
OOO - Own Opinions Only. With best wishes. See www.jmwa.demon.co.uk If
dictionaries were correct, we would only need one, because they would all give
the same information.
John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK
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