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On 4/9/2012 6:28 PM, Peter C. Wallace wrote:
> On Mon, 9 Apr 2012, Charles Steinkuehler wrote:
> 
>> Date: Mon, 09 Apr 2012 18:21:12 -0500 From: Charles Steinkuehler
>> <char...@steinkuehler.net>
<snip>
> <quote "configs/hm2-stepper/7i43-small.ini"> # Step timing is 40 us
> steplen + 40 us stepspace # That gives 80 us step period = 12.5 KHz
> step freq # # Bah, even software stepping can handle that, hm2
> doesnt buy you much with # such slow steppers. # </quote>
> 
> Questions:
> 
> 1) Why is the step rate so low on the 7I43?  I don't see any
> direct reason in the hm2 HDL design, the LinuxCNC software, or the
> EPP port limitations that should require this low step rate.  What
> am I missing?
> 
>> Because the example file is a real example file for a specific
>> step drive that just happens to have those timings
> 
>> The actual hardware limitation on steprate is ClockLow/4 (for a
>> 7I43 this is 50 MHz/4 = 12.5 MHz)

That makes much more sense.  Thanks!

- -- 
Charles Steinkuehler
char...@steinkuehler.net
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