A late reply, due to a week spent out on the farm, making sawdust instead of swarf, and dodging a wombat who's taken up residence in the home paddock. (He doesn't understand that he's supposed to be nocturnal, not strolling about in the middle of the afternoon in bright sunlight.)
On 25.05.12 06:01, Dave Caroline wrote: > Remember this is an LC network running at some amps and the current is > not in phase with the voltage. so switching at zero volts might mean > very high currents at that instant Ah yes, that can complicate things a bit, due to the much higher voltages generated if the LC network is set ringing due to those sudden large transitions in current. The loss provided by the load ought normally damp that severely, but on no load, it would be inadvisable to switch capacitors, I figure. Let's look at it below, to see how the worst risks might be avoided. On 25.05.12 06:15, John Thornton wrote: > Do you have an example circuit of this that I can drool over? Sorry, no, I've never seen one for the whole problem. I was just thinking of bits of circuit I'd put together to start to tame the design challenge if it stood in front of me. If the alternative phase converter approaches described downthread don't pan out, and you do want to try switching capacitors to match various load situations, then we could draw up schematics for elements of a design, such as the zero crossing detector, isolated triac drive, etc. (Then it's just a matter of getting it all to work acceptably, despite the problematic constraints. ;-)) There is ample truth in Jon's initial admonition, but with some careful design we can avoid smoke, without a lot of hardware, or too much pain, AFAICT. (It would probably not be a casual amateur design project, though.) The triacs naturally turn off at near-zero current, so would be continuously driven, or repeatedly pulsed, while we want them on. It would be OK to switch a capacitor out at near-zero current, since it cannot excite inductor back-emf when switching at that point, and no large currents result. But with the current in each capacitor leading the voltage by something less than 90°, choice of the "quietest" switch-on point is not zero current, because that's approaching maximum voltage across the capacitor. To avoid enormous switching currents¹, we have to either switch a capacitor by switching in and then bridging current limiting resistors (thus multiplying the number of triac switches needed), or switch it in near zero voltage, which is around maximum current. That is much less of a problem than might appear, I think. Increasing the size of the capacitor bank at an instant when it has negligible voltage across it does only one thing - it reduces the rate of voltage increase per unit current on the next cycle. i.e. it moves the phase relationship. (Which, curiously, is what we're trying to achieve. :-) For the current zero crossing detector, a low value power resistor and two back-to-back optocouplers plus one collector resistor suffice. The voltage zero crossing detector differs by having a large value resistor which is shunt rather than series connected. They are all we need for monitoring each capacitor bank. In the FitchWConverter (appearing downthread) there are two capacitors, and perhaps better performance results from being able to twiddle both of them? If so, we'd need two pairs of detectors. And before we forget, the switched out capacitor needs to be discharged, either by a permanent high value bleed resistor (if the RC time constant is shorter than the minimum time before we reasonably would whack the capacitor back in), or a lower value resistor switched across the capacitor once it is isolated, if the phase twiddling capacitor switching were done at a furious rate. Pretty much all but the tiny AVRs have at least two interrupt inputs, so we can efficiently handle the zero crossings without resort to polling, and the 16 to 20 MIPS available in the family is an order of magnitude more than we need for the task. If triac gate drive is taken from the power circuit, then a cheap high voltage opto-SSR in an 8-pin DIL package would be nifty for interface to the microcontroller, but if drive is taken from the control circuitry, then we'd need to generate both positive and negative drive pulses to handle all conduction quadrants, and a small pulse transformer made from a quite small toroid and a few inches of copper wire, would do the trick. On-board PWM could look after that, without tying up the CPU. The major ingredient though, is the sweat needed to change "eminently achievable" to "done". And I will admit that the scope for show-stopping surprises grows both with power levels and circuit inductance. (But here we're only switching part of the capacitance, so I believe the latter risk is greatly mitigated.) Sorry there's no off-the shelf circuit, but there are at least two feasible ways to do this, I think. And with the control in software, an implementation would be amenable to tweaking in some comfort. Oh ... all right, it isn't easy. But it's not hard, either. Erik ¹ A capacitor to be switched back in might be charged to the negative peak voltage, from when it was last in-circuit, and we could now have positive peak voltage. Switching it back in would be spectacular, expensive, and educational. -- "The rich invest their money and spend what is left over, whereas the poor spend their money and invest what is left over" - Jim Rohn ------------------------------------------------------------------------------ Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. 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