On 9/7/2013 8:18 AM, John Prentice (FS) wrote: > Greetings > > Can someone please help me understand how the hal_pru_generic driver/comp, > called with a number of stepgens= and pwmgens=, ends up mapping the > generated signals to hardware pins on the BBB headers (or chip)? Similarly > how does the hal_bb_gpio mapping work? > > TIA and apologies if I am missing something obvious.
There are far too many pin naming schemes for the BeagleBone, including two new ones used by the LinuxCNC Beaglebone code. Short answer: ============ Read the code (sorry!) Medium answer: ============ The PRU code uses an integer value that equals the kernel GPIO number plus 32 (so that zero means "don't twiddle *ANY* pins!"). The values are also extended, and what would be the non-existing GPIO bank 4 means "Use the PRU direct I/O pins". The hal_bb_gpio pin numbers is: 1xx = P8 2xx = P9 xx = connector pin number Long Answer: ============ I really need to make a blog page about pin numbering. There's some data in Brandon Heller's post about home/limit switches: http://bb-lcnc.blogspot.com/2013/07/adding-homelimit-switches.html I'll try to get something posted tonight... -- Charles Steinkuehler [email protected]
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