On 3 November 2016 at 20:57, Gene Heskett <[email protected]> wrote: > I am drowning in a lack of human readable docs here folks, doesn't anyone > have a life preserver?
Can the human read vhdl? The actual pin allocations for (for example) 7i90_spi_sssvst8_8_8.bit would be defined by the file PIN_SSSVST8_8_8_72.vhd However, if you have what you want on the current pins, does it matter which bitfile it is? But, with 8 stepgens and 4 each of pwm/encoder it is going to be probably 7i90_spi_svst4_8.bit (ie, 4 x servo + 8 x stepper) That one does give the stepgens a lot of pins, though. What is your readhmid output? I don't think that what you have is differential pairs, differential is handled by the daughter-boards. The vhdl has IOPortTag & x"00" & StepGenTag & x"81", -- I/O 24 IOPortTag & x"00" & StepGenTag & x"82", -- I/O 25 IOPortTag & x"00" & StepGenTag & x"83", -- I/O 26 IOPortTag & x"00" & StepGenTag & x"84", -- I/O 27 IOPortTag & x"00" & StepGenTag & x"85", -- I/O 28 IOPortTag & x"00" & StepGenTag & x"86", -- I/O 29 Which ( https://github.com/LinuxCNC/linuxcnc/blob/master/src/hal/drivers/mesa-hostmot2/pins.c#L126 ) is 81: "Step"; 82: "Direction"; 83: "Table2Pin"; 84: "Table3Pin"; 85: "Table4Pin"; 86: "Table5Pin"; 87: "Table6Pin"; 88: "Table7Pin"; But you won't typically get all those pins. What does dmesg say when you load the driver? -- atp "A motorcycle is a bicycle with a pandemonium attachment and is designed for the especial use of mechanical geniuses, daredevils and lunatics." — George Fitch, Atlanta Constitution Newspaper, 1916 ------------------------------------------------------------------------------ Developer Access Program for Intel Xeon Phi Processors Access to Intel Xeon Phi processor-based developer platforms. With one year of Intel Parallel Studio XE. Training and support from Colfax. Order your platform today. http://sdm.link/xeonphi _______________________________________________ Emc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-users
