On Thursday 03 November 2016 17:53:00 andy pugh wrote: > On 3 November 2016 at 20:57, Gene Heskett <[email protected]> wrote: > > I am drowning in a lack of human readable docs here folks, doesn't > > anyone have a life preserver? > > Can the human read vhdl? > > The actual pin allocations for (for example) 7i90_spi_sssvst8_8_8.bit > would be defined by the file PIN_SSSVST8_8_8_72.vhd
Which I didn't copy over. And like a dumbass, I overwrote the save readhmid file, but the synopsis is 4 encoders, 4 pwmgens, and 8 stepgens. > > However, if you have what you want on the current pins, does it matter > which bitfile it is? Not really, provided I can get it to come to life, ON the pi, and get a dmesg report I can print. Unforch, the shorthand dictionaries the composer of the images Matsche sent me, and the epp/spi pinout definitions in the 7i90HD.pdf came from 2 different dictionaries. So ATM, I am sitting here trying to decode one to the other and actually get it hooked up to the pi, and flailing about trying tp sort it. If someone could supply a pi 40 pin # to 7i90 26 pin # table, I would be ecstatic. So far I've found and connected a ground, and the spi clock, the rest of what I have, each is swahili to the other. I've some occasionally noisy weather, and am fresh out of AC outputs in here that are both star grounded, and UPS protected. > > But, with 8 stepgens and 4 each of pwm/encoder it is going to be > probably 7i90_spi_svst4_8.bit (ie, 4 x servo + 8 x stepper) > > That one does give the stepgens a lot of pins, though. All of which are gpio's if I loadrt it correctly. > What is your readhmid output? I don't think that what you have is > differential pairs, differential is handled by the daughter-boards. > > The vhdl has > > IOPortTag & x"00" & StepGenTag & x"81", -- I/O 24 > IOPortTag & x"00" & StepGenTag & x"82", -- I/O 25 > IOPortTag & x"00" & StepGenTag & x"83", -- I/O 26 > IOPortTag & x"00" & StepGenTag & x"84", -- I/O 27 > IOPortTag & x"00" & StepGenTag & x"85", -- I/O 28 > IOPortTag & x"00" & StepGenTag & x"86", -- I/O 29 > > Which ( > https://github.com/LinuxCNC/linuxcnc/blob/master/src/hal/drivers/mesa- >hostmot2/pins.c#L126 ) is > > 81: "Step"; > 82: "Direction"; > 83: "Table2Pin"; > 84: "Table3Pin"; > 85: "Table4Pin"; > 86: "Table5Pin"; > 87: "Table6Pin"; > 88: "Table7Pin"; > > But you won't typically get all those pins. What does dmesg say when > you load the driver? It didn't, I only have one machine still running on a parport, and the 5i25 I am useing on the others hasn't a clue how to talk spi. What I did get out of it, was obtained thru an epp port, which no longer works now that I have written the spi file and power cycled it. So it looks like the only avenue is to make it speak spi, on the pi. So I have soggy hat in hand, begging for a direct interconnection table, one that speaks the same dialect of swahili on both ends. Thanks Andy. Cheers, Gene Heskett -- "There are four boxes to be used in defense of liberty: soap, ballot, jury, and ammo. Please use in that order." -Ed Howdershelt (Author) Genes Web page <http://geneslinuxbox.net:6309/gene> ------------------------------------------------------------------------------ Developer Access Program for Intel Xeon Phi Processors Access to Intel Xeon Phi processor-based developer platforms. With one year of Intel Parallel Studio XE. Training and support from Colfax. Order your platform today. http://sdm.link/xeonphi _______________________________________________ Emc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-users
