Please post - EtherLab version: is not installed. (graphical interface is not used). - EtherCAT master version: 1.4.0 - EtherCAT master logs containing the exact error message (after setting 'ethercat debug 1' and loading your application). Two different proves: 1. Using the user command interface. Trying to pass the slave in OP states using: /opt/etherlab/bin/ethercat states OP. And correspoonds to the master logs: "ethercat.log" (File attached). 2. Using a application "mini.c". And corresponds to the master log: etherlab.log1.
- Output of 'ethercat slave -p<your-slave> -v'
=== Slave 0 ===
Alias: 5
State: PREOP
Flag: +
Identity:
Vendor Id: 0x00000002
Product code: 0x26483052
Revision number: 0x00000064
Serial number: 0x00000000
Mailboxes:
RX: 0x1000/128, TX: 0x1400/128
Supported protocols: EoE, CoE, FoE
General:
Group: EvaBoardDemo
Image name: DEVICE
Order number: EL9800-0100
Device name: EL9800 (V4.08) (SPI, ET1100)
CoE details:
Enable SDO: yes
Enable SDO Info: yes
Enable PDO Assign: no
Enable PDO Configuration: no
Enable Upload at startup: no
Enable SDO complete access: no
Flags:
Enable SafeOp: no
Enable notLRW: no
Current consumption: 0 mA
- Output of 'ethercat pdos -p<your-slave> -v'
SM0: PhysAddr 0x1000, DefaultSize 128, ControlRegister 0x26, Enable 1
SM1: PhysAddr 0x1400, DefaultSize 128, ControlRegister 0x22, Enable 1
SM2: PhysAddr 0x1800, DefaultSize 2, ControlRegister 0x24, Enable 1
RxPDO 0x1601 "DO RxPDO-Map"
PDO entry 0x7010:01, 1 bit, "LED 1"
PDO entry 0x7010:02, 1 bit, "LED 2"
PDO entry 0x7010:03, 1 bit, "LED 3"
PDO entry 0x7010:04, 1 bit, "LED 4"
PDO entry 0x0000:00, 12 bit, "Gap"
SM3: PhysAddr 0x1c00, DefaultSize 6, ControlRegister 0x20, Enable 1
TxPDO 0x1a00 "DI TxPDO-Map"
PDO entry 0x6000:01, 1 bit, "Switch 1"
PDO entry 0x6000:02, 1 bit, "Switch 2"
PDO entry 0x6000:03, 1 bit, "Switch 3"
PDO entry 0x6000:04, 1 bit, "Switch 4"
PDO entry 0x0000:00, 12 bit, "Gap"
TxPDO 0x1a02 "AI TxPDO-Map"
PDO entry 0x6020:01, 1 bit, "Underrange"
PDO entry 0x6020:02, 1 bit, "Overrange"
PDO entry 0x6020:03, 2 bit, "Limit 1"
PDO entry 0x6020:05, 2 bit, "Limit 2"
PDO entry 0x0000:00, 8 bit, "Gap"
PDO entry 0x1802:07, 1 bit, ""
PDO entry 0x1802:09, 1 bit, ""
PDO entry 0x6020:11, 16 bit, "Analog input"
Following the PIC debbug tool we identified that the problem could be that
the space memory according sync manager it's empty (0x0810:0x081F). We
figurated out that the master didn't write the data of those SyncManager
(SM2 and SM3).
--
Edgar Camilo Garzon Coral
Studente Politecnico di Torino
Laurea Specialistica Ingegneria Elettronica
Cel. +39 320 2979984
[email protected]
[email protected]
8139too Fast Ethernet driver 0.9.28 ACPI: PCI Interrupt 0000:04:00.0[A] -> GSI 21 (level, low) -> IRQ 21 eth1: RealTek RTL8139 at 0x1000, 00:1d:0f:c1:4a:1b, IRQ 21 eth1: Identified 8139 chip type 'RTL-8100B/8139D' EtherCAT: Master driver 1.4.0 r1611 EtherCAT: 1 master waiting for devices. ACPI: PCI interrupt for device 0000:04:00.0 disabled ec_8139too EtherCAT-capable Fast Ethernet driver 0.9.28, master 1.4.0 r1611 ACPI: PCI Interrupt 0000:04:00.0[A] -> GSI 21 (level, low) -> IRQ 21 EtherCAT: Accepting device 00:1D:0F:C1:4A:1B for master 0. ec0: RealTek RTL8139 at 0x1000, 00:1d:0f:c1:4a:1b, IRQ 21 ec0: Identified 8139 chip type 'RTL-8100B/8139D' EtherCAT: Starting EtherCAT-IDLE thread. EtherCAT: Master debug level set to 1. EtherCAT DEBUG: File closed. EtherCAT: Link state changed to UP. EtherCAT: 1 slave(s) responding. EtherCAT: Slave states: PREOP. EtherCAT: Scanning bus. EtherCAT WARNING: Unknown category type 0x003C in slave 0. EtherCAT DEBUG: Scanning PDO assignment and mapping of slave 0. EtherCAT DEBUG: Reading PDO assignment of SM2. EtherCAT DEBUG: Uploading SDO 0x1C12:00 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 12 1C 00 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 4F 12 1C 00 01 00 00 00 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 01 EtherCAT DEBUG: 1 PDOs assigned. EtherCAT DEBUG: Uploading SDO 0x1C12:01 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 12 1C 01 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 4B 12 1C 01 01 16 00 00 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 01 16 EtherCAT DEBUG: PDO 0x1601. EtherCAT DEBUG: Uploading SDO 0x1601:00 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 01 16 00 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 4F 01 16 00 05 00 00 00 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 05 EtherCAT DEBUG: 5 PDO entries mapped. EtherCAT DEBUG: Uploading SDO 0x1601:01 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 01 16 01 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 01 16 01 01 01 10 70 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 01 01 10 70 EtherCAT DEBUG: PDO entry 0x7010:01, 1 bit, "???". EtherCAT DEBUG: Uploading SDO 0x1601:02 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 01 16 02 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 01 16 02 01 02 10 70 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 01 02 10 70 EtherCAT DEBUG: PDO entry 0x7010:02, 1 bit, "???". EtherCAT DEBUG: Uploading SDO 0x1601:03 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 01 16 03 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 01 16 03 01 03 10 70 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 01 03 10 70 EtherCAT DEBUG: PDO entry 0x7010:03, 1 bit, "???". EtherCAT DEBUG: Uploading SDO 0x1601:04 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 01 16 04 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 01 16 04 01 04 10 70 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 01 04 10 70 EtherCAT DEBUG: PDO entry 0x7010:04, 1 bit, "???". EtherCAT DEBUG: Uploading SDO 0x1601:05 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 01 16 05 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 01 16 05 0C 00 00 00 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 0C 00 00 00 EtherCAT DEBUG: PDO entry 0x0000:00, 12 bit, "Gap". EtherCAT DEBUG: Reading PDO assignment of SM3. EtherCAT DEBUG: Uploading SDO 0x1C13:00 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 13 1C 00 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 4F 13 1C 00 02 00 00 00 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 02 EtherCAT DEBUG: 2 PDOs assigned. EtherCAT DEBUG: Uploading SDO 0x1C13:01 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 13 1C 01 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 4B 13 1C 01 00 1A 00 00 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 00 1A EtherCAT DEBUG: PDO 0x1A00. EtherCAT DEBUG: Uploading SDO 0x1A00:00 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 00 1A 00 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 4F 00 1A 00 05 00 00 00 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 05 EtherCAT DEBUG: 5 PDO entries mapped. EtherCAT DEBUG: Uploading SDO 0x1A00:01 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 00 1A 01 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 00 1A 01 01 01 00 60 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 01 01 00 60 EtherCAT DEBUG: PDO entry 0x6000:01, 1 bit, "???". EtherCAT DEBUG: Uploading SDO 0x1A00:02 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 00 1A 02 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 00 1A 02 01 02 00 60 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 01 02 00 60 EtherCAT DEBUG: PDO entry 0x6000:02, 1 bit, "???". EtherCAT DEBUG: Uploading SDO 0x1A00:03 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 00 1A 03 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 00 1A 03 01 03 00 60 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 01 03 00 60 EtherCAT DEBUG: PDO entry 0x6000:03, 1 bit, "???". EtherCAT DEBUG: Uploading SDO 0x1A00:04 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 00 1A 04 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 00 1A 04 01 04 00 60 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 01 04 00 60 EtherCAT DEBUG: PDO entry 0x6000:04, 1 bit, "???". EtherCAT DEBUG: Uploading SDO 0x1A00:05 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 00 1A 05 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 00 1A 05 0C 00 00 00 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 0C 00 00 00 EtherCAT DEBUG: PDO entry 0x0000:00, 12 bit, "Gap". EtherCAT DEBUG: Uploading SDO 0x1C13:02 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 13 1C 02 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 4B 13 1C 02 02 1A 00 00 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 02 1A EtherCAT DEBUG: PDO 0x1A02. EtherCAT DEBUG: Uploading SDO 0x1A02:00 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 02 1A 00 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 4F 02 1A 00 08 00 00 00 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 08 EtherCAT DEBUG: 8 PDO entries mapped. EtherCAT DEBUG: Uploading SDO 0x1A02:01 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 02 1A 01 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 02 1A 01 01 01 20 60 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 01 01 20 60 EtherCAT DEBUG: PDO entry 0x6020:01, 1 bit, "???". EtherCAT DEBUG: Uploading SDO 0x1A02:02 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 02 1A 02 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 02 1A 02 01 02 20 60 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 01 02 20 60 EtherCAT DEBUG: PDO entry 0x6020:02, 1 bit, "???". EtherCAT DEBUG: Uploading SDO 0x1A02:03 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 02 1A 03 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 02 1A 03 02 03 20 60 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 02 03 20 60 EtherCAT DEBUG: PDO entry 0x6020:03, 2 bit, "???". EtherCAT DEBUG: Uploading SDO 0x1A02:04 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 02 1A 04 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 02 1A 04 02 05 20 60 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 02 05 20 60 EtherCAT DEBUG: PDO entry 0x6020:05, 2 bit, "???". EtherCAT DEBUG: Uploading SDO 0x1A02:05 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 02 1A 05 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 02 1A 05 08 00 00 00 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 08 00 00 00 EtherCAT DEBUG: PDO entry 0x0000:00, 8 bit, "Gap". EtherCAT DEBUG: Uploading SDO 0x1A02:06 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 02 1A 06 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 02 1A 06 01 07 02 18 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 01 07 02 18 EtherCAT DEBUG: PDO entry 0x1802:07, 1 bit, "???". EtherCAT DEBUG: Uploading SDO 0x1A02:07 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 02 1A 07 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 02 1A 07 01 09 02 18 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 01 09 02 18 EtherCAT DEBUG: PDO entry 0x1802:09, 1 bit, "???". EtherCAT DEBUG: Uploading SDO 0x1A02:08 from slave 0. EtherCAT DEBUG: Upload request: EtherCAT DEBUG: 00 20 40 02 1A 08 00 00 00 00 EtherCAT DEBUG: Upload response: EtherCAT DEBUG: 00 30 43 02 1A 08 10 11 20 60 EtherCAT DEBUG: Uploaded data: EtherCAT DEBUG: 10 11 20 60 EtherCAT DEBUG: PDO entry 0x6020:11, 16 bit, "???". EtherCAT DEBUG: Reading of PDO configuration finished. EtherCAT: Bus scanning completed in 164 ms. EtherCAT: Starting EoE processing. EtherCAT DEBUG: Changing state of slave 0 from PREOP to PREOP (forced). EtherCAT DEBUG: Configuring slave 0... EtherCAT DEBUG: Slave 0 is now in INIT. EtherCAT DEBUG: Clearing FMMU configurations of slave 0... EtherCAT DEBUG: Configuring mailbox sync managers of slave 0. EtherCAT DEBUG: SM0: Addr 0x1000, Size 128, Ctrl 0x26, En 1 EtherCAT DEBUG: SM1: Addr 0x1400, Size 128, Ctrl 0x22, En 1 EtherCAT DEBUG: Slave 0 is now in PREOP. EtherCAT DEBUG: Finished configuration of slave 0. EtherCAT DEBUG: Fetching SDO dictionary from slave 0. EtherCAT DEBUG: Fetched 20 SDOs and 115 entries from slave 0. EtherCAT DEBUG: File opened. EtherCAT DEBUG: ioctl(filp = 0xf77bf840, cmd = 0x8030a400 (0x0), arg = 0xbfae238c) EtherCAT DEBUG: ioctl(filp = 0xf77bf840, cmd = 0xc130a401 (0x1), arg = 0xbfae225c) EtherCAT DEBUG: ioctl(filp = 0xf77bf840, cmd = 0x4004a409 (0x9), arg = 0xbfae23b8) EtherCAT DEBUG: File closed. EtherCAT DEBUG: Changing state of slave 0 from PREOP to OP. EtherCAT DEBUG: Configuring slave 0... EtherCAT DEBUG: Slave 0 is now in INIT. EtherCAT DEBUG: Clearing FMMU configurations of slave 0... EtherCAT DEBUG: Configuring mailbox sync managers of slave 0. EtherCAT DEBUG: SM0: Addr 0x1000, Size 128, Ctrl 0x26, En 1 EtherCAT DEBUG: SM1: Addr 0x1400, Size 128, Ctrl 0x22, En 1 EtherCAT DEBUG: Slave 0 is now in PREOP. EtherCAT DEBUG: Slave 0 is not configured. EtherCAT ERROR: Failed to set SAFEOP state, slave 0 refused state change (PREOP + ERROR). EtherCAT ERROR: Unknown AL status code 0x0000. EtherCAT: Acknowledged state PREOP on slave 0.
/******************************************************************************
*
* $Id: mini.c 1604 2008-12-29 15:19:16Z fp $
*
* Copyright (C) 2006-2008 Florian Pose, Ingenieurgemeinschaft IgH
*
* This file is part of the IgH EtherCAT Master.
*
* The IgH EtherCAT Master is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version 2, as
* published by the Free Software Foundation.
*
* The IgH EtherCAT Master is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
* Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with the IgH EtherCAT Master; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* Using the EtherCAT technology and brand is permitted in compliance with
* the industrial property and similar rights of Beckhoff Automation GmbH.
*
*****************************************************************************/
#include <linux/module.h>
#include <linux/timer.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <ecrt.h> // EtherCAT realtime interface
/*****************************************************************************/
// Module parameters
#define FREQUENCY 100
// Optional features
#define CONFIGURE_PDOS 1
#define EXTERNAL_MEMORY 1
#define SDO_ACCESS 0
#define PFX "ec_mini: "
/*****************************************************************************/
// EtherCAT
static ec_master_t *master = NULL;
static ec_master_state_t master_state = {};
spinlock_t master_lock = SPIN_LOCK_UNLOCKED;
static ec_domain_t *domain1 = NULL;
static ec_domain_state_t domain1_state = {};
static ec_slave_config_t *sc_ana_in = NULL;
static ec_slave_config_state_t sc_ana_in_state = {};
// Timer
static struct timer_list timer;
/*****************************************************************************/
// process data
static uint8_t *domain1_pd; // process data memory
#define EL9800SlavePos 5, 0
#define Beckhoff_EL9800 0x00000002, 0x04570862
// offsets for PDO entries
static unsigned int off_ana_in;
const static ec_pdo_entry_reg_t domain1_regs[] = {
{EL9800SlavePos, Beckhoff_EL9800, 0x6020, 0x11, &off_ana_in},
// {EL9800SlavePos, Beckhoff_EL9800, 0x6000, 0x01, &off_ana_in},
{}
};
static unsigned int counter = 0;
static unsigned int blink = 0;
/*****************************************************************************/
#if CONFIGURE_PDOS
// Analog in --------------------------
static ec_pdo_entry_info_t el9800_pdo_entries[] = {
{0x6020, 0x01, 1}, // bit, "Underrange"
{0x6020, 0x02, 1}, // bit, "Overrange"
{0x6020, 0x03, 2}, // bit, "Limit 1"
{0x6020, 0x05, 2}, // bit, "Limit 2"
{0x0000, 0x00, 8}, // bit, "Gap"
{0x1802, 0x07, 1}, // bit, ""
{0x1802, 0x09, 1}, // bit, ""
{0x6020, 0x11, 16} // bit, "Analog input"
};
static ec_pdo_info_t el9800_pdos[] = {
{0x1A02, 8, el9800_pdo_entries},
};
static ec_sync_info_t el9800_syncs[] = {
{2, EC_DIR_OUTPUT},
{3, EC_DIR_INPUT, 1, el9800_pdos},
{0xff}
};
#endif
/*****************************************************************************/
#if SDO_ACCESS
static ec_sdo_request_t *sdo;
#endif
/*****************************************************************************/
void check_domain1_state(void)
{
ec_domain_state_t ds;
spin_lock(&master_lock);
ecrt_domain_state(domain1, &ds);
spin_unlock(&master_lock);
if (ds.working_counter != domain1_state.working_counter)
printk(KERN_INFO PFX "Domain1: WC %u.\n", ds.working_counter);
if (ds.wc_state != domain1_state.wc_state)
printk(KERN_INFO PFX "Domain1: State %u.\n", ds.wc_state);
domain1_state = ds;
}
/*****************************************************************************/
void check_master_state(void)
{
ec_master_state_t ms;
spin_lock(&master_lock);
ecrt_master_state(master, &ms);
spin_unlock(&master_lock);
if (ms.slaves_responding != master_state.slaves_responding)
printk(KERN_INFO PFX "%u slave(s).\n", ms.slaves_responding);
if (ms.al_states != master_state.al_states)
printk(KERN_INFO PFX "AL states: 0x%02X.\n", ms.al_states);
if (ms.link_up != master_state.link_up)
printk(KERN_INFO PFX "Link is %s.\n", ms.link_up ? "up" : "down");
master_state = ms;
}
/*****************************************************************************/
void check_slave_config_states(void)
{
ec_slave_config_state_t s;
spin_lock(&master_lock);
ecrt_slave_config_state(sc_ana_in, &s);
spin_unlock(&master_lock);
if (s.al_state != sc_ana_in_state.al_state)
printk(KERN_INFO PFX "AnaIn: State 0x%02X.\n", s.al_state);
if (s.online != sc_ana_in_state.online)
printk(KERN_INFO PFX "AnaIn: %s.\n", s.online ? "online" : "offline");
if (s.operational != sc_ana_in_state.operational)
printk(KERN_INFO PFX "AnaIn: %soperational.\n",
s.operational ? "" : "Not ");
sc_ana_in_state = s;
}
/*****************************************************************************/
#if SDO_ACCESS
void read_sdo(void)
{
switch (ecrt_sdo_request_state(sdo)) {
case EC_SDO_REQUEST_UNUSED: // request was not used yet
ecrt_sdo_request_read(sdo); // trigger first read
break;
case EC_SDO_REQUEST_BUSY:
printk(KERN_INFO PFX "Still busy...\n");
break;
case EC_SDO_REQUEST_SUCCESS:
printk(KERN_INFO PFX "SDO value: 0x%04X\n",
EC_READ_U16(ecrt_sdo_request_data(sdo)));
ecrt_sdo_request_read(sdo); // trigger next read
break;
case EC_SDO_REQUEST_ERROR:
printk(KERN_INFO PFX "Failed to read SDO!\n");
ecrt_sdo_request_read(sdo); // retry reading
break;
}
}
#endif
/*****************************************************************************/
static int loopCounter = 0;
void cyclic_task(unsigned long data)
{
// receive process data
spin_lock(&master_lock);
ecrt_master_receive(master);
ecrt_domain_process(domain1);
spin_unlock(&master_lock);
// check process data state (optional)
check_domain1_state();
if (counter) {
counter--;
} else { // do this at 1 Hz
printk(KERN_INFO PFX "Ciclyc task step %d.\n",loopCounter++);
counter = FREQUENCY;
// calculate new process data
blink = !blink;
// check for master state (optional)
check_master_state();
// check for islave configuration state(s) (optional)
check_slave_config_states();
#if SDO_ACCESS
// read process data SDO
read_sdo();
#endif
}
// write process data
// EC_WRITE_U8(domain1_pd + off_dig_out, blink ? 0x06 : 0x09);
// send process data
spin_lock(&master_lock);
ecrt_domain_queue(domain1);
ecrt_master_send(master);
spin_unlock(&master_lock);
// restart timer
timer.expires += HZ / FREQUENCY;
add_timer(&timer);
}
/*****************************************************************************/
int request_lock(void *data)
{
spin_lock(&master_lock);
return 0; // access allowed
}
/*****************************************************************************/
void release_lock(void *data)
{
spin_unlock(&master_lock);
}
/*****************************************************************************/
int __init init_mini_module(void)
{
#if EXTERNAL_MEMORY
unsigned int size;
#endif
printk(KERN_INFO PFX "Starting...\n");
if (!(master = ecrt_request_master(0))) {
printk(KERN_INFO PFX "Requesting master 0 failed!\n");
goto out_return;
}
ecrt_master_callbacks(master, request_lock, release_lock, NULL);
printk(KERN_INFO PFX "Registering domain...\n");
if (!(domain1 = ecrt_master_create_domain(master))) {
printk(KERN_INFO PFX "Domain creation failed!\n");
goto out_release_master;
}
if (!(sc_ana_in = ecrt_master_slave_config(
master, EL9800SlavePos, Beckhoff_EL9800))) {
printk(KERN_INFO PFX "Failed to get slave configuration.\n");
goto out_release_master;
}
#if CONFIGURE_PDOS
printk(KERN_INFO PFX "Configuring PDOs...\n");
if (ecrt_slave_config_pdos(sc_ana_in, EC_END, el9800_syncs)) {
printk(KERN_INFO PFX "Failed to configure PDOs.\n");
goto out_release_master;
}
#endif
#if SDO_ACCESS
printk(KERN_INFO PFX "Creating SDO requests...\n");
if (!(sdo = ecrt_slave_config_create_sdo_request(sc_ana_in, 0x3102, 2, 2))) {
printk(KERN_INFO PFX "Failed to create SDO request.\n");
goto out_release_master;
}
ecrt_sdo_request_timeout(sdo, 500); // ms
#endif
printk(KERN_INFO PFX "Registering PDO entries...\n");
if (ecrt_domain_reg_pdo_entry_list(domain1, domain1_regs)) {
printk(KERN_INFO PFX "PDO entry registration failed!\n");
goto out_release_master;
}
#if EXTERNAL_MEMORY
if ((size = ecrt_domain_size(domain1))) {
if (!(domain1_pd = (uint8_t *) kmalloc(size, GFP_KERNEL))) {
printk(KERN_INFO PFX "Failed to allocate %u bytes of process data"
" memory!\n", size);
goto out_release_master;
}
ecrt_domain_external_memory(domain1, domain1_pd);
}
#endif
printk(KERN_INFO PFX "Activating master...\n");
if (ecrt_master_activate(master)) {
printk(KERN_INFO PFX "Failed to activate master!\n");
#if EXTERNAL_MEMORY
goto out_free_process_data;
#else
goto out_release_master;
#endif
}
#if !EXTERNAL_MEMORY
// Get internal process data for domain
domain1_pd = ecrt_domain_data(domain1);
#endif
printk(KERN_INFO PFX "Starting cyclic sample thread.\n");
init_timer(&timer);
timer.function = cyclic_task;
timer.expires = jiffies + 10;
add_timer(&timer);
printk(KERN_INFO PFX "Started.\n");
return 0;
#if EXTERNAL_MEMORY
out_free_process_data:
kfree(domain1_pd);
#endif
out_release_master:
printk(KERN_INFO PFX "Releasing master...\n");
ecrt_release_master(master);
out_return:
printk(KERN_INFO PFX "Failed to load. Aborting.\n");
return -1;
}
/*****************************************************************************/
void __exit cleanup_mini_module(void)
{
printk(KERN_INFO PFX "Stopping...\n");
del_timer_sync(&timer);
#if EXTERNAL_MEMORY
kfree(domain1_pd);
#endif
printk(KERN_INFO PFX "Releasing master...\n");
ecrt_release_master(master);
printk(KERN_INFO PFX "Unloading.\n");
}
/*****************************************************************************/
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Florian Pose <[email protected]>");
MODULE_DESCRIPTION("EtherCAT minimal test environment");
module_init(init_mini_module);
module_exit(cleanup_mini_module);
/*****************************************************************************/
ethercat.log1
Description: Binary data
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