On Mon, 2010-07-12 at 00:33 +0200, Carl-Daniel Hailfinger wrote:
> Hi Daniel,
>
> thanks for your patch.
>
> Could I interest you in implementing support for all other AMIC A25
> series chips as well? Even if you can't test those, it would expand
> flashrom coverage a lot.
Sure, I can do that. Patch for AMIC A25L{05,10,20,40,16}{T,U} and
generic AMIC is attached, as well as a pretty-printer for their status
register.
Signed-off-by: Daniel Lenski <[email protected]>
Now here's a strange thing: The datasheets for these parts, which come
in many different versions with errata, are riddled with and omissions
and weird descriptions, probably due to quick-and-dirty copy-pasting by
whoever's writing/translating them.
A quick search of Datasheetarchive.com suggests that the following parts
exist:
A25L05P[TU] - ID 2020/2010 (T/U)
A25L10P[TU] - ID 2021/2011 (T/U)
A25L20P[TU] - ID 2022/2012 (T/U)
A25L40P[TU] - ID 2013 (Datasheet says U *and* T parts have same ID)
A25L80P - ID 2014 (only U parts exist, AFAICT)
A25L16P[TU] - ID 2025/2015 (T/U)
I'm willing to bet that A25L40PT actually has the device ID 2023, and
*not* 2013. So my attached patch modifies the device ID for the
A25L40PT accordingly. I note that Erase is untested for the
A25L40P[TU]... if someone has a part with device ID 2013, I'd love to
know if its erase behavior works as expected.
Dan
Index: spi25.c
===================================================================
--- spi25.c (revision 1075)
+++ spi25.c (working copy)
@@ -328,6 +328,16 @@
}
/* Prettyprint the status register. Works for
+ * AMIC A25L series
+ */
+void spi_prettyprint_status_register_amic_a25l(uint8_t status)
+{
+ msg_cdbg("Chip status register: Status Register Write Disable "
+ "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
+ spi_prettyprint_status_register_common(status);
+}
+
+/* Prettyprint the status register. Works for
* ST M25P series
* MX MX25L series
*/
@@ -389,6 +399,10 @@
status = spi_read_status_register();
msg_cdbg("Chip status register is %02x\n", status);
switch (flash->manufacture_id) {
+ case AMIC_ID:
+ if ((flash->model_id & 0xff00) == 0x2000)
+ spi_prettyprint_status_register_amic_a25l(status);
+ break;
case ST_ID:
if (((flash->model_id & 0xff00) == 0x2000) ||
((flash->model_id & 0xff00) == 0x2500))
Index: flashchips.c
===================================================================
--- flashchips.c (revision 1075)
+++ flashchips.c (working copy)
@@ -1155,14 +1155,206 @@
.read = read_memmapped,
},
- /* The next two chip definitions have top/bottom boot blocks, but has no
- device differentiation between the two */
+ /* AMIC */
+
{
.vendor = "AMIC",
+ .name = "A25L05PT",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = AMIC_ID,
+ .model_id = AMIC_A25L05PT,
+ .total_size = 64,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid4,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {32 * 1024, 1},
+ {16 * 1024, 1},
+ {8 * 1024, 1},
+ {4 * 1024, 2},
+ },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {64 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ },
+
+ {
+ .vendor = "AMIC",
+ .name = "A25L05PU",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = AMIC_ID,
+ .model_id = AMIC_A25L05PU,
+ .total_size = 64,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid4,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {4 * 1024, 2},
+ {8 * 1024, 1},
+ {16 * 1024, 1},
+ {32 * 1024, 1},
+ },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {64 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ },
+
+ {
+ .vendor = "AMIC",
+ .name = "A25L10PT",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = AMIC_ID,
+ .model_id = AMIC_A25L10PT,
+ .total_size = 128,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid4,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {64 * 1024, 1},
+ {32 * 1024, 1},
+ {16 * 1024, 1},
+ {8 * 1024, 1},
+ {4 * 1024, 2},
+ },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {128 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ },
+
+ {
+ .vendor = "AMIC",
+ .name = "A25L10PU",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = AMIC_ID,
+ .model_id = AMIC_A25L10PU,
+ .total_size = 128,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid4,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {4 * 1024, 2},
+ {8 * 1024, 1},
+ {16 * 1024, 1},
+ {32 * 1024, 1},
+ {64 * 1024, 1},
+ },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {128 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ },
+
+ {
+ .vendor = "AMIC",
+ .name = "A25L20PT",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = AMIC_ID,
+ .model_id = AMIC_A25L20PT,
+ .total_size = 256,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid4,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {64 * 1024, 3},
+ {32 * 1024, 1},
+ {16 * 1024, 1},
+ {8 * 1024, 1},
+ {4 * 1024, 2},
+ },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {256 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ },
+
+ {
+ .vendor = "AMIC",
+ .name = "A25L20PU",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = AMIC_ID,
+ .model_id = AMIC_A25L20PU,
+ .total_size = 256,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid4,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {4 * 1024, 2},
+ {8 * 1024, 1},
+ {16 * 1024, 1},
+ {32 * 1024, 1},
+ {64 * 1024, 3},
+ },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {256 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ },
+
+ /* The entries for A25L40P{T,U} previously distinguished
+ * top/bottom boot blocks, without any distinction in RDID.
+ * This is probably an error in the datasheets from AMIC,
+ * since the A25L{05,10,20,16}{T/U} parts all distinguish
+ * top/bottom boot blocks in the RDID. I've changed the
+ * model_ID for A25L40PT to reflect what it "should" be
+ * according to the established pattern.
+ */
+ {
+ .vendor = "AMIC",
.name = "A25L40PT",
.bustype = CHIP_BUSTYPE_SPI,
.manufacture_id = AMIC_ID,
- .model_id = AMIC_A25L40P,
+ .model_id = AMIC_A25L40PT,
.total_size = 512,
.page_size = 256,
.tested = TEST_OK_PRW,
@@ -1193,7 +1385,7 @@
.name = "A25L40PU",
.bustype = CHIP_BUSTYPE_SPI,
.manufacture_id = AMIC_ID,
- .model_id = AMIC_A25L40P,
+ .model_id = AMIC_A25L40PU,
.total_size = 512,
.page_size = 256,
.tested = TEST_OK_PRW,
@@ -1252,6 +1444,68 @@
{
.vendor = "AMIC",
+ .name = "A25L16PT",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = AMIC_ID,
+ .model_id = AMIC_A25L16PT,
+ .total_size = 2048,
+ .page_size = 256,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid4,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {64 * 1024, 31},
+ {32 * 1024, 1},
+ {16 * 1024, 1},
+ {8 * 1024, 1},
+ {4 * 1024, 2},
+ },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {2048 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ },
+
+ {
+ .vendor = "AMIC",
+ .name = "A25L16PU",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = AMIC_ID,
+ .model_id = AMIC_A25L16PU,
+ .total_size = 512,
+ .page_size = 256,
+ .tested = TEST_OK_PRW,
+ .probe = probe_spi_rdid4,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = {
+ {4 * 1024, 2},
+ {8 * 1024, 1},
+ {16 * 1024, 1},
+ {32 * 1024, 1},
+ {64 * 1024, 31},
+ },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { { * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ },
+
+ {
+ .vendor = "AMIC",
.name = "A29002B",
.bustype = CHIP_BUSTYPE_PARALLEL,
.manufacture_id = AMIC_ID_NOPREFIX,
@@ -6491,7 +6745,23 @@
.read = read_memmapped,
},
+ /* generic SPI chips */
{
+ .vendor = "AMIC",
+ .name = "unknown AMIC SPI chip",
+ .bustype = CHIP_BUSTYPE_SPI,
+ .manufacture_id = AMIC_ID,
+ .model_id = GENERIC_DEVICE_ID,
+ .total_size = 0,
+ .page_size = 256,
+ .tested = TEST_BAD_PREW,
+ .probe = probe_spi_rdid4,
+ .probe_timing = TIMING_ZERO,
+ .write = NULL,
+ .read = NULL,
+ },
+
+ {
.vendor = "Atmel",
.name = "unknown Atmel SPI chip",
.bustype = CHIP_BUSTYPE_SPI,
Index: flashchips.h
===================================================================
--- flashchips.h (revision 1075)
+++ flashchips.h (working copy)
@@ -75,8 +75,20 @@
#define AMIC_ID 0x7F37 /* AMIC */
#define AMIC_ID_NOPREFIX 0x37 /* AMIC */
-#define AMIC_A25L40P 0x2013
-#define AMIC_A25L80P 0x2014
+#define AMIC_A25L05PT 0x2020
+#define AMIC_A25L05PU 0x2010
+#define AMIC_A25L10PT 0x2021
+#define AMIC_A25L10PU 0x2011
+#define AMIC_A25L20PT 0x2022
+#define AMIC_A25L20PU 0x2012
+#define AMIC_A25L40PT 0x2023 /* Datasheet says T and U have
+ same device ID, but this
+ seems implausible given the
+ clear pattern */
+#define AMIC_A25L40PU 0x2013
+#define AMIC_A25L80P 0x2014 /* Seems that no A25L80PT exists */
+#define AMIC_A25L16PT 0x2025
+#define AMIC_A25L16PU 0x2015
#define AMIC_A29002B 0x0d
#define AMIC_A29002T 0x8C /* Same as A290021T */
#define AMIC_A29040B 0x86
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