Hi
Does anyone know if an open toolchain is available for any FPGA series?
I think Xilinx's open bitstream experiments began and ended with the
62* series, when they acquired the small firm Algotronix. 62* series
is rather old too. I believe some of their newer devices offer
"partial reconfiguration" : http://tinyurl.com/yqk6c4 . This works a
bit like memory overlays in certain machines.
Generally FPGA vendors are protective of their bitstream formats and
this precludes the possibility of open (and self-hosting) software ->
hardware translators.
Of course if you don't mind having a proprietary bit of software in
the loop then many experiments are possible. JBits is probably as
close as one can get for now: http://tinyurl.com/2fehf6
Open Cores project is a good place to track the open state of the
art: www.opencores.org
Closed Bitstream Sadness here
http://xwt.org/thoughts/bitstream.secrecy.html
http://www.tuxdeluxe.org/node/204
One day, hopefully one day...
Toby
On 27 Nov 2007, at 16:34, Antoine van Gelder wrote:
Ian Piumarta wrote:
Several of us here (at VPRI) are interested in the potential of
better synergy between hardware and software. Something we'd love
to see is the *OLA back-end generating netlists for FPGAs, or
better still reprogramming them on the fly (which I'm told is
possible, but I've yet to see an example). Just-in-time software
deserves just-in-time hardware, no? ;-)
Was looking at FPGA's a month or two ago asking questions about
reconfigurability and clockless computing and apparently the Xilinx
62* series of FPGAs are not only capable of being rewritten on the
fly but - even better - you can reprogram only a subset of the
gates if you want!
Also looks intriguing: http://www.falvotech.com/blog/index.php?/
archives/200-Forth-Day-Report.html
- a
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