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Here is a (I hope) simple ATAPI PIO example..

Lets assume an ATAPI device with a 25 byte data block.  The host
wants to execute a Write 10 command of 5 data blocks.  That would
be a total of 125 data bytes.  This would require the host to add
a pad byte making it 126 bytes.  The host follows the ATA/ATAPI
protocols and selects the devices and sends the PACKET command
with the Byte Count Limit set to 40.  After decoding the command
packet (the Write 10 command for 5 blocks) the device, when ready
to transfer a DRQ data block, provides status of BSY=0 and DRQ=1
with a valid Byte Count value.  Lets say the device set BC to 20.
In this case the host responses by writing the Data register
   (20 + 1) / 2)
times, or 10 times.  The data transfer would continue with the
next DRQ data block.

Here are some possible valid DRQ blocks that could be used
by the device for this command (these are the BC values a device
could use):

1) A series of bursts: 20 bytes, 40 bytes, 20 bytes,
   40 bytes, 5 bytes.
2) A series of bursts: 40 bytes, 30 bytes, 10 bytes,
   40 bytes, 5 bytes.
3) A series of bursts: 10 bytes, 40 bytes, 30 bytes,
   20 bytes, 10 bytes, 15 bytes.

Here are some invalid examples:

1) A single burst of 125 bytes (violates BCL).
2) A series of bursts: 40 bytes, 60 bytes, 25 bytes
   (violates BCL).
3) A series of bursts: 40 bytes, 25 bytes, 40 bytes,
   20 bytes (only last DRQ burst can have an odd
   number of bytes).

The point here is that the DRQ data bursts have nothing to do
with the media data block size. Gee, that is just like DMA data
transfers!.


***  Hale Landis  *** [EMAIL PROTECTED] ***
*** Niwot, CO USA ***   www.ata-atapi.com   ***


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