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Hello Andre,

>Since the new ADMA is a MMIO core and not IOMIO, you are required an new
>subclass ident.

   And we have it--base class/subclass for ADMA is 01/05, not 01/01.

>Whereas BAR4 is an PCI IO_MASK under SFF-8038i rules and the new Intel doc
>e02105r0,

  Haven't seen this last doc on the server yet...

> ADMA uses and extended MMIO at BAR4 and crosses BAR5.

  Of that what I'm pretty aware.

>They are not the same transport layer.

  And of that too.

  Nevertheless, I don't see the point of standardizing values of the
ADMA-compliant
chip PCI device ID and revision ID. Those things were always at vendor
discretion.
ATAPI support (or lack thereof) by ADMA could've been and must be reported
in
some other way than standardized PCI revision ID, if the ADMA standard
allows
the optional support of ATAPI devices.


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