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On Mon, 7 Oct 2002 12:07:53 -0600, Pat LaVarre wrote:
>This message is from the T13 list server.
>> you really have to run at the slowest cycle time
>> regardless of the mode capability.

Absolutely YES. [I hate to say this here but... Why do people think
you can violate the setup and hold times for the address and IOR/IOW
signals? Why does this keep coming up here? Is the state of EE
education in this country that bad these days? Good grief, this
question should never come up!]

>>Anybody know if this is what Microsoft does,
>or is this just a theoretical argument and a Bios
>convention?

This was always one of those things that would be obvious to any EE
that gave it any thought! But it was added to ATA/ATAPI-x in
ATA/ATAPI-5: See Note 5 in the PIO timing tables (register and data
transfer). 

>The spec doesn't trumpet this limitation, does it?

Yes it does... See above.

>> master has to be online
>> for all register accesses
>Why the Master any more than the Slave?

And I must echo this question - There is NO difference between the
actions of device 0 and device 1 when it comes to how the signals are
decoded and acted upon.

>They both have to watch for DEV and SRST
>and ExecuteDeviceDiagnostic writes.  There's
>nothing that the Master alone has to watch for,
>is there?

This is correct when talking about how devices respond to the
interface signals from the host... There is nothing special that
device 0 does... And there is nothing special device 1 does.

Hale



*** Hale Landis *** www.ata-atapi.com ***



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