This message is from the T13 list server.
> Why does this keep coming up here?
Because designing a bus to let one device slow down
all the others is a traditionally rude way to behave?
Because then DVD drives, for example, have to burst
register data at HDD speeds, just because they share a
cable?
That's economically wrong, no matter how technically
correct it may be, whoops.
> See Note 5 in
> the PIO timing tables
> (register and data transfer).
A note in a timing table may not qualify as "trumpet".
That's not in the same league as, say, our remarks on
"Single Device Configuration".
We certainly haven't written down an algorithm for
the interpretation of two sets of op xEC/A1 data,
have we?
> Is the state of EE education
> in this country that bad
I hear B.S. Computer Engineering curricula have been
dropping assembly code. Dunno if that's true.
> DVD drives ... HDD speeds
Did we the committee design DMA to be more immune to
this kind of thing? Does the spec now require the host to
give a slow target enough time to ignore the DMA
traffic to a fast target?
Thanks again in advance, Pat LaVarre
-----Original Message-----
From: Hale Landis [mailto:[EMAIL PROTECTED]]
Sent: Mon 10/7/2002 12:28 PM
To: [EMAIL PROTECTED]
Cc:
Subject: RE: [t13] Master and Slave speed
This message is from the T13 list server.
On Mon, 7 Oct 2002 12:07:53 -0600, Pat LaVarre wrote:
>This message is from the T13 list server.
>> you really have to run at the slowest cycle time
>> regardless of the mode capability.
Absolutely YES. [I hate to say this here but... Why do people think
you can violate the setup and hold times for the address and IOR/IOW
signals? Why does this keep coming up here? Is the state of EE
education in this country that bad these days? Good grief, this
question should never come up!]
>>Anybody know if this is what Microsoft does,
>or is this just a theoretical argument and a Bios
>convention?
This was always one of those things that would be obvious to any EE
that gave it any thought! But it was added to ATA/ATAPI-x in
ATA/ATAPI-5: See Note 5 in the PIO timing tables (register and data
transfer).
>The spec doesn't trumpet this limitation, does it?
Yes it does... See above.
>> master has to be online
>> for all register accesses
>Why the Master any more than the Slave?
And I must echo this question - There is NO difference between the
actions of device 0 and device 1 when it comes to how the signals are
decoded and acted upon.
>They both have to watch for DEV and SRST
>and ExecuteDeviceDiagnostic writes. There's
>nothing that the Master alone has to watch for,
>is there?
This is correct when talking about how devices respond to the
interface signals from the host... There is nothing special that
device 0 does... And there is nothing special device 1 does.
Hale
*** Hale Landis *** www.ata-atapi.com ***
