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Hi all, I have a question on the device PIO data-out command protocol. I'm using SATA-IO's SATA spec 2.5. Let's assume the following sequence: 1 Software programs task file registers to transfer 1 sector to device using PIO 2 HBA sends Register FIS with command information to device 3 Device sends PIO Setup FIS to host, Status = 0x48, E_Status = 0xc0 4 Seeing BSY == 0 and DRQ == 1, software writes one sector to the Data register 5 HBA sends Data FIS to device, some error corrupts the FIS and it is answered with R_ERR by the device 6 HBA places E_Status in Status register (BSY still 1) because byte count for DRQ block is reached (HT_PIOOTrans2->HT_PIOEnd) And now my question: Is the device required to transition from DPIOO2: Receive_Data to DPIOO3: Send_Status and send a Register FIS (with BSY = 0 and ERR = 1) to the host? From how I interpret the spec, I assume yes. Could anybody please second or oppose? Otherwise, BSY would remain 1 and software would need to detect a time-out. Thanks in advance, Alex.
