Without knowing exactly what a problem is, I like to at least eliminate some
things. More often than not this process leads to the answer.
As there are only a few offending pins, what are their individual
properties?
Are you generating a netlist or using the synchroniser?
Just some stray thoughts.
HTH
Brendon.
----- Original Message -----
From: "Jim Muehlberg" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Thursday, May 10, 2001 10:14 AM
Subject: Re: [PEDA] No ERC nets??
> Abd ul-Rahman Lomax wrote:
> >
> > At 02:08 PM 5/9/01 -0600, Jim Muehlberg wrote:
> > >I discovered that all of the locations where I specified "NO ERC" have
> > >netlisted together on the schematic.
> > >I'd call that a bug!
> > >
> > >Anyone else seen this?
> >
> > I haven't; but my guess is that if one of us has, he or she will also
have
> > the answer as to why it happened. This is not normal behavior for No-ERC
> > directives, which should have no effect whatever on netlising. On the
other
> > hand, if Mr. Muehlberg placed a net label called "NO ERC" on the
locations,
>
> Just to clarify, I do not have a "NO ERC" net! Upon closer examination,
> though, not all of the no ERC points netlisted. Just a few did this.
> More erratic behavior if you ask me!
>
>
>
> --
> Jim Muehlberg
> Electrical Engineer
> LO/IF Group
> National Radio Astronomy Observatory
> P.O. Box O
> 1003 Lopezville Rd.
> Socorro, NM 87801
> P: 505-835-7140/7195
> F: 505-835-7027
> http://www.aoc.nrao.edu/~jmuehlbe
>
>
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