> there is possibly a misconception here about electrical test,
> especially for Proto boards. Did you give them an electrical netlist
derived
> from your database? If not then this is probably what occurred.
> They received your files, used their CAM software to generate a
> netlist, however sounds like their CAM software may have misinterpreted
some
> of the Gerber data for one reason or another. Then they used that
generated
> netlist complete with the error(s) to test the boards and they all tested
> fine. I am sure that you can see what is wrong with this scenario, it
relies
I have never been able to get any board house to accept any Protel-generated
netlists. They claim that it's not a usable format for their testing
equipment. They generate their own test file, God knows how. Sometimes it
doesn't work. I remember getting 3 of 40 boards a while back that had
shorted traces (not the same on each board), but their electrical test
passed it. When I confronted them about it, they claimed they had some
"tester problems" that week. Duh! I got them to replace the faulty boards,
but I was still SOL for the components used on them.
Why doesn't someone at Protel and the board-tester companies get together
and make a compatible format? How hard could it be for them to do?
Best regards,
Ivan Baggett
Bagotronix Inc.
website: www.bagotronix.com
----- Original Message -----
From: "Brad Velander" <[EMAIL PROTECTED]>
To: "'Protel EDA Forum'" <[EMAIL PROTECTED]>
Sent: Wednesday, June 27, 2001 6:33 PM
Subject: Re: [PEDA] How do I modify the design rules to allow a shorted li
nk to gnd?
> Jon,
> there is possibly a misconception here about electrical test,
> especially for Proto boards. Did you give them an electrical netlist
derived
> from your database? If not then this is probably what occurred.
> They received your files, used their CAM software to generate a
> netlist, however sounds like their CAM software may have misinterpreted
some
> of the Gerber data for one reason or another. Then they used that
generated
> netlist complete with the error(s) to test the boards and they all tested
> fine. I am sure that you can see what is wrong with this scenario, it
relies
> on them reading and interpreting your Gerber data correctly. Result, they
> may have been tested and they would have tested fine. Sounds like this
could
> have been the source of your open shorting links as well.
> A secondary issue exists for the virtual jumpers, they are opens as
> far as your netlist is concerned so if you did send an electrical netlist
> the boards should have all failed the test because of the virtual short
> where your netlist said there was no connection.
>
> With the shorting links I would not be surprised if those were the
> result of some over eager CAM operator who spotted the virtual short,
> thought it was an error where the data was off by a factor of about 20 so
he
> adjusted your virtual shorts to something that would etch out in
processing
> ( I believe you said 4 mils). You must understand that they could possibly
> detect the 0.00005" gap with their software and think that they were
> supposed to be legitimate opens. I believe that Abd ul-Rahman stated one
> time that he sends a readme file to the fabricator which tells the
> fabricator that these virtual shorts exist so that they understand what is
> going on if they do spot them.
> In all fairness to the Fabricator, you should check the Gerbers you
> sent him and make sure that the error(s) were not already present in your
> Gerber data. If they weren't, then you had a problem with the fabricator
and
> their interface to your data. I have never met a fabricator yet who didn't
> want to get it right the first time.
>
> An old acquaintance, who happens to be Chinese so imagine a strong
> stereotypical Chinese accent, used to tell his customers. "Old Chinese
> Confucius saying, good no cheap, cheap no good! So you want good or no
> good". 8^>
>
> Brad Velander,
> Lead PCB Designer,
> Norsat International Inc.,
> #300 - 4401 Still Creek Dr.,
> Burnaby, B.C., V5C 6G9.
> Tel. (604) 292-9089 direct
> Fax (604) 292-9010
> website www.norsat.com
>
>
> > -----Original Message-----
> > From: Jon Elson [mailto:[EMAIL PROTECTED]]
> > Sent: Wednesday, June 27, 2001 2:47 PM
> > To: Protel EDA Forum
> > Subject: Re: [PEDA] How do I modify the design rules to allow
> > a shorted
> > li nk to gnd?
> >
> >
> >
> > I used the 'low bidder' to see how they were, and had some problems.
> <SNIP>
>
> > But, if the fabricator accepts payment for electrical test
> > without doing it,
> > who knows WHAT they do in the photoplotting department!
> >
> > Jon
>
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