>> <<On Sun, 16 Jul 2000 11:41:37 -0700 (PDT), "Rodney W. Grimes" 
>> > Ohh... and a finally note, DEC blew the chip design by only including
>> > a 160byte threshold point given that PCI 2.0 spec says it should have
>> > been 500bytes!!
>> It wouldn't be the first thing DEC had screwed up in the design of
>> these NICs.  On the other hand, Intel has owned the silicon for a
>> couple of years now, which is more than enough time to unscrew it if
>> they really wanted to.  Clearly, they'd rather be selling 82559s....
>As far as I can tell the fxp driver doesn't even use the tx_fifo in the
>825xxx chips :-)

   The 82557-9 have a 2KB internal buffer for transmits. They don't start
transmitting until a programmed threshold is reached - this is to insure
that PCI bus latency doesn't result in the transmitter getting stalled.
The fxp driver starts out with this threshold set at 512 bytes, but will
increase it (512 bytes at a time) when a DMA underrun occurs. Of course
once the threshold reached 1536, then an entire 1500 byte packet is DMA'd
into the buffer before the transmit begins.
   There is buffering on the receive side as well, but I don't recall off
hand how large that is (although I think it's 2KB as well).


David Greenman
Co-founder, The FreeBSD Project - http://www.freebsd.org
Manufacturer of high-performance Internet servers - http://www.terasolutions.com
Pave the road of life with opportunities.

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